Showing papers by "Yan-Fei Liu published in 2011"

Switching Loss Analysis Considering Parasitic Loop Inductance With Current Source Drivers for Buck Converters

Abstract: In this letter, the switching loop inductance was investigated on the current-source drivers (CSDs). The analytical model was developed to predict the switching losses. It is noted that although the CSDs can greatly reduce the switching transition time and switching loss, the switching loop inductance still causes the current holding effect on the CSDs. This results in high turn-off loss for the control MOSFET in a buck converter. An improved layout was proposed to achieve minimum switching loop inductance. The experimental results verified the significant switching loss reduction owing to the proposed layout of a 1-MHz buck converter with 12-V input, and 1.3-V and 30-A output.

Compensation circuit and method for a synchronous rectifier driver

Abstract: Provided are circuits and methods for driving the synchronous rectifier (SR) of a power converter. A non-linear voltage sense compensator is applied across the drain and source of the SR, and a sense signal is provided to the SR driver sense input, such that false triggering of the SR is effectively eliminated. In addition, the voltage sense compensator ensures that the SR is turned on as soon as its current starts to flow and is turned off when its current falls to zero. The embodiments described herein may be incorporated into new VR designs, or they may be used to improve the SR driving characteristics of commercially available voltage sensing SR drivers.

A practical control strategy to improve unloading transient response performance for buck converters

Abstract: In this paper, a practical control strategy is presented which is capable of controlling a 12V–1.5V Buck converter and an auxiliary converter to achieve significantly improved unloading response performance. The auxiliary circuit is controlled by peak current mode method for a predictable number of auxiliary switching, while the charge balance controller minimizes the settling time of the Buck converter. In the proposed strategy, a good tradeoff has been made (between the trends to further suppress the voltage overshoot and reduce the power loss). Furthermore, analysis of the auxiliary circuit power loss and the improved output voltage overshoot has been conducted as a design guideline. Finally, simulation and experimental results are provided to verify the proposed scheme on a 12V–1.5V 10A Buck converter prototype.

A Nonisolated ZVS Self-Driven Current Tripler Topology for Low-Voltage and High-Current Applications

Abstract: A new nonisolated zero-voltage-switching (ZVS) current tripler topology is proposed in this paper. It is suitable to nonisolated low input voltage applications, especially 12 V input voltage regulator modules (VRMs). At the same time, due to high gate drive voltage using the input voltage, the conduction losses of the SRs can be reduced. The self-driven scheme can also achieve the reduced body diode conduction and gate energy recovery of the SRs so that no external drive IC with the dead time control is needed. More importantly, the existing multiphase buck controllers and buck drivers can be directly used in the proposed topology. Other benefits of the isolated current tripler are also maintained. The nonisolated self-driven current quadrupler and N -phase rectifier are also proposed. A 12-V input, 1.0-V/50-A output, 1-MHz prototype was built to verify the advantages of the proposed topology.

Methods and Circuits for Improving the Dynamic Response of a DC-DC Converter

Abstract: Methods and circuits are described herein which may be used to improve the unloading transient response of a DC-DC converter. In some embodiments the transient response may be improved by improving the way MOSFET switches in the buck converter are controlled at the point in time when a current transient is detected, and subsequently during the transient, in such a way that the impact of the current transient is mitigated. In other embodiments an auxiliary current source is used to provide rapid transient response required by the overall power converter, leaving the main portion of the DC-DC converter to provide long term stability.

A novel analog implementation of capacitor charge balance controller with a practical extreme voltage detector

Abstract: In this paper, a practical analog implementation of capacitor charge balance controller is presented, which is capable of achieving the optimal response for dc-dc Buck converters without relying on the knowledge of the nominal passive component (output inductor and capacitor) value. This ready-for-integration analog controller applies the output voltage curve analysis for deriving the formulas to optimize the response under the load transients. A simple extension is also offered for adaptive voltage positioning (AVP) application to power the modern processors. Furthermore, an operational amplifier (OPAMP) based peak/valley voltage detector is presented in place of using a fast or asynchronous ADC, as a result, lower cost, lower operating power consumption and fully analog implementation can be expected. Finally, simulation and experimental results are provided to validate the proposed schemes.

Adaptive Current Source Drivers for MHz Power Factor Correction

Abstract: Current Source Drivers (CSDs) are investigated for MHz Power Factor Correction (PFC) applications. Due to the fast duty cycle change, the half-bridge (HB) CSD topology can hardly be accepted for high frequency PFC Applications. To solve the problem, the full-bridge (FB) CSD topology is used instead. It is interesting to note that the FB CSD with the continuous inductor current can actually achieve adaptive drive currents inherently depending on the drain currents in the main power MOSFETs to achieve optimal design. The loss analysis and design procedure are also presented for the FB CSD for the boot PFC converter. Due to the fast switching speed and the switching loss reduction, an efficiency improvement of 3.5% can be achieved to a 1MHz/ 300W boost PFC converter with the line input voltage of 110V. The analysis and simulation results verified the conclusion.

Adaptive Current Source Drivers for Efficiency Optimization of High Frequency

Abstract: In this paper, the concept of the adaptive CSDs is proposed for high frequency synchronous buck converters. The idea of the adaptive CSDs is to achieve optimal design of the switching loss reduction and the drive loss reduction for wide load range. It should be noted that the adaptive concept is suitable for both the continuous and discontinuous CSDs regardless the drive circuit topologies. Through investigating the CSD circuits, one simple method to achieve the adaptive drive current based on the adaptive voltages is proposed. The linear regulator can be used to achieve the function of the adaptive voltages and drive currents in a cost-effective manner. A 12V input, 1.3V output and 1MHz synchronous buck converter was built to verify the advantages of the proposed adaptive CSDs. Index Terms- current-source driver (CSD), power MOSFET, buck converter, voltage regulator (VR), voltage regulator module (VRM), resonant gate driver

An improved driving method for synchronous rectifier using drain-source voltage sensing

Abstract: Traditional voltage sensing method has already been widely used for the synchronous rectifier. However, the parasitic parameters will cause the false turn-on and early turn-off problem. In this paper, the conception of zero-crossing noise filter is presented. By applying this filter to the synchronous rectifier, the false turn-on and early turnoff problem can be resolved. Only three passive components are needed in the proposed filter which makes it reliable and easy to implement. Simulation and experimental results show that the zero-crossing noise filter can significantly improve the reliability as well as the efficiency of the power circuit. A 400V to 12V 100W Flyback converter and a 600W half bridge LLC resonant converter prototype are built to verify the advantages of the new zero-crossing noise filter.

Adaptive current source drivers for efficiency optimization of high frequency synchronous buck converters

Abstract: In this paper, the concept of the adaptive CSDs is proposed for high frequency synchronous buck converters. The idea of the adaptive CSDs is to achieve optimal design of the switching loss reduction and the drive loss reduction for wide load range. It should be noted that the adaptive concept is suitable for both the continuous and discontinuous CSDs regardless the drive circuit topologies. Through investigating the CSD circuits, one simple method to achieve the adaptive drive current based on the adaptive voltages is proposed. The linear regulator can be used to achieve the function of the adaptive voltages and drive currents in a cost-effective manner. A 12V input, 1.3V output and 1MHz synchronous buck converter was built to verify the advantages of the proposed adaptive CSDs.

Adaptive discontinuous Current Source Driver to achieve switching loss reduction for MHz PFC boost converters

Abstract: Adaptive control concept for the discontinuous Current Source Drivers (CSDs) is proposed for MHz Power Factor Correction (PFC) boost converters. Compared to the continuous CSDs, the discontinuous CSDs have lower circulating current and less conduction loss. Therefore, the discontinuous CSDs are able to use higher gate drive current to reduce the switching loss further. Using different pre-charge time to build Current Source (CS) inductor currents based on different load conditions, the gate drive currents can be achieved adaptively to the load currents, so that the efficiency of the PFC converter can be improved in a wide operation range. The CS inductor of the discontinuous CSD is as low as 120nH. This reduces the board space of the main MOSFET driver part. An 110V input, 380V/ 200W output, 1MHz PFC boost converter with the proposed adaptive discontinuous CSD was built to verify the advantages. With the discontinuous CSD, at 50% load, an efficiency improvement of 5.1% is achieved over the conventional voltage source driver (VSD), and at full load, an efficiency improvement of 4.8% is achieved. The measured PF values are all above 99% and complying with the industrial requirements.

The digital control for two-transistor forward converter based on capacitor charge balance

Abstract: In this paper, a novel digital control algorithm is proposed to achieve an excellent dynamic performance for two-transistor forward converter. By using the charge balance control(CBC), the optimal transient time and the suitable duty cycle series can be predicted, then better transient performance can be obtained. A comparison of dynamic performances between CBC and conventional voltage mode control is performed in Matlab/Simulink, the results demonstrate the superiority of proposed algorithm.

An algorithm for Buck-Boost converter based on the principle of capacitor charge balance

Abstract: In this paper, a novel non-linear control algorithm is applied to a Buck-Boost converter. Based on the concept of capacitor charge balance, the proposed algorithm predicts an improved transient response for a Buck-Boost converter during the large load-current step change. The equations used to calculate the improved transient time are presented. Some traditional control methods are introduced. The simulation of Buck-Boost converter based on the charge balance control mode and voltage mode control was done. Through the simulation results it can illustrate that the proposed controller had a superior performance when compared to the conventional voltage mode controller.

High-accuracy digital controlled isolated power supply with low data transfer requirements

Abstract: In this paper, a digital controlled isolated power supply system is developed combing an 8B/10B-based protocol and a Multi-Resolution Feedback (MRF) method to achieve optimized communication. It features 4 times higher output accuracy and averagely consumes less than a half bandwidth than existing systems, and transmits all data using a single pulse-transformer, which saves substantial cost of high-speed isolators. Experimental results demonstrate the feasibility of the proposed system.

MHz Power Factor Correction with Adaptive Current Source Drivers

Abstract: Adaptive Current Source Drivers (CSDs) are proposed for MHz Power Factor Correction (PFC) applications. Due to the fast duty cycle change, the half-bridge (HB) CSD topology can hardly be accepted for high frequency PFC Applications. To solve the problem, the full-bridge (FB) CSD topology is used instead. It is interesting to note that the FB CSD with the continuous inductor current can actually achieve adaptive drive currents inherently depending on the drain currents in the main power MOSFETs to achieve optimal design. The loss analysis and design procedure are also presented for the FB CSD for the boot PFC converter. Due to the fast switching speed and the switching loss reduction, an efficiency improvement of 3.2% can be achieved to a 1MHz/ 300W boost PFC converter with the line input voltage of 110VAC. The analysis and experimental results verified the conclusion.