IEEE transactions on computer-aided design of integrated circuits and systems : a publication of the IEEE Circuits and Systems Society

Fault-Tolerant Computer System Design by Dhiraj K. Pradhan 550 pp. $72 Prentice Hall Upper Saddle River, N.J. 1996 ISBN 0-13-057887-8

Fault-tolerant computer system design

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Optical Networks A Practical Perspective

The crossing number is a popular tool in graph drawing and visualization, but there is not really just one crossing number; there is a large family of crossing number notions of which the crossing number is the best known. We survey the rich variety of crossing number variants that have been introduced in the literature for purposes that range from studying the theoretical underpinnings of the crossing number to crossing minimization for visualization problems.

The Graph Crossing Number and its Variants: A Survey

We experimentally demonstrate a spatially non-blocking five-port optical router, which is based on microring resonators tuned through the thermo-optic effect. The characteristics of the microring-resonator-based switching element are investigated to achieve balanced performances in its two output ports. The optical router is fabricated on the SOI platform using standard CMOS processing. The effective footprint of the device is about 440×660 μm2. The microring resonators have 3-dB bandwidths of larger than 0.31 nm (38 GHz), and extinction ratios of better than 21 dB for through ports and 16 dB for drop ports. Finally, 12.5 Gbps high-speed signal transmission experiments verify the routing functionality of the optical router.

Five-port optical router for photonic networks-on-chip

Crosstalk noise is an intrinsic characteristic of photonic devices used by optical networks-on-chip (ONoCs) as well as a potential issue. For the first time, this paper analyzed and modeled the crosstalk noise, signal-to-noise ratio (SNR), and bit error rate (BER) of optical routers and ONoCs. The analytical models for crosstalk noise, minimum SNR, and maximum BER in mesh-based ONoCs are presented. An automated crosstalk analyzer for optical routers is developed. We find that crosstalk noise significantly limits the scalability of ONoCs. For example, due to crosstalk noise, the maximum BER is 10−3 on the 8×8 mesh-based ONoC using an optimized crossbar-based optical router. To achieve the BER of 10−9 for reliable transmissions, the maximum ONoC size is 6×6. A novel compact high-SNR optical router is proposed to improve the maximum ONoC size to 8×8.

Crosstalk noise and bit error rate analysis for optical network-on-chip

As benchmark programs for microprocessor architectures, network-on-chip (NoC) traffic patterns are essential tools for NoC performance assessments and architecture explorations. The fidelity of NoC traffic patterns has profound influence on NoC studies. For the first time, this paper presents a realistic traffic benchmark suite, called MCSL, and the methodology used to generate it. The publicly released MCSL benchmark suite includes a set of realistic traffic patterns for 8 real applications and covers popular NoC architectures. It captures not only the communication behaviors in NoCs but also the temporal dependencies among them. MCSL benchmark suite can be easily incorporated into existing NoC simulators and significantly improve NoC simulation accuracy. We developed a systematic traffic generation methodology to create MCSL based on real applications. The methodology uses formal computational models to capture both communication and computation requirements of applications. It optimizes application mapping and scheduling to faithfully maximize overall system performance and utilization before extracting realistic traffic patterns through cycle-accurate simulations. Experiment results show that MCSL benchmark suite can be used to study NoC characteristics more accurately than traditional random traffic patterns.

A NoC Traffic Suite Based on Real Applications

Optical networks-on-chip (ONoCs) are emerging communication architectures that can potentially offer ultrahigh communication bandwidth and low latency to multiprocessor systems-on-chip (MPSoCs). In addition to ONoC architectures, 3-D integrated technologies offer an opportunity to continue performance improvements with higher integration densities. In this paper, we present a 3-D mesh-based ONoC for MPSoCs, and new low-cost nonblocking 4 × 4, 5 × 5, 6 × 6, and 7 × 7 optical routers for dimension-order routing in the 3-D mesh-based ONoC. Besides, we propose an optimized floorplan for the 3-D mesh-based ONoC. The floorplan follows the regular 3-D mesh topology but implements all optical routers in a single optical layer. The floorplan is optimized to minimize the number of extra waveguide crossings caused when merging the 3-D ONoC to one optical layer. Based on a set of real applications and uniform traffic pattern, we develop a SystemC-based cycle-accurate NoC simulator and compare the 3-D mesh-based ONoC with the matched 2-D mesh-based ONoC and 2-D electronic NoC for performance and energy efficiency. Additionally, we quantitatively analyze thermal effects on the 3-D 8 × 8 × 2 mesh-based ONoC.

3-D Mesh-Based Optical Network-on-Chip for Multiprocessor System-on-Chip

Optical networks-on-chip (ONoCs) using wavelength-division multiplexing (WDM) technology have progressively attracted more and more attention for their use in tackling the high-power consumption and low bandwidth issues in growing metallic interconnection networks in multiprocessor systems-on-chip. However, the basic optical devices employed to construct WDM-based ONoCs are imperfect and suffer from inevitable power loss and crosstalk noise. Furthermore, when employing WDM, optical signals of various wavelengths can interfere with each other through different optical switching elements within the network, creating crosstalk noise. As a result, the crosstalk noise in large-scale WDM-based ONoCs accumulates and causes severe performance degradation, restricts the network scalability, and considerably attenuates the signal-to-noise ratio (SNR). In this paper, we systematically study and compare the worst case as well as the average crosstalk noise and SNR in three well-known optical interconnect architectures, mesh-based, folded-torus-based, and fat-tree-based ONoCs using WDM. The analytical models for the worst case and the average crosstalk noise and SNR in the different architectures are presented. Furthermore, the proposed analytical models are integrated into a newly developed crosstalk noise and loss analysis platform (CLAP) to analyze the crosstalk noise and SNR in WDM-based ONoCs of any network size using an arbitrary optical router. Utilizing CLAP, we compare the worst case as well as the average crosstalk noise and SNR in different WDM-based ONoC architectures. Furthermore, we indicate how the SNR changes in respect to variations in the number of optical wavelengths in use, the free-spectral range, and the microresonators $\boldsymbol {Q}$ factor. The analyses’ results demonstrate that the crosstalk noise is of critical concern to WDM-based ONoCs: in the worst case, the crosstalk noise power exceeds the signal power in all three WDM-based ONoC architectures, even when the number of processor cores is small, e.g., 64.

Crosstalk Noise in WDM-Based Optical Networks-on-Chip: A Formal Study and Comparison

Network-on-chip (NoC) can improve the performance, power efficiency, and scalability of multiprocessor system-on-chip (MPSoC) However, traditional NoCs using metallic interconnects consume significant amount of power to deliver even higher communication bandwidth required in the near future Optical NoCs are based on CMOS-compatible optical waveguides and micro resonators, and promise significant bandwidth and power advantages In this paper, we propose a hybrid optical mesh NoC, HOME, which utilizes optical waveguides as well as metallic interconnects in a hierarchical manner HOME employs a new set of protocols to improve the network throughput and latency We compared HOME with a matched optical mesh NoC for a 64-core MPSoC in 45nm, using SPICE simulations and our cycle-accurate multi-objective NoC simulation platform, MoLab Comparing with the optical mesh NoC, HOME uses 75% less optical/electronic interfaces and laser diodes Simulation results show that HOME achieves 17% higher throughput and 40% less latency while consuming 42% less power

Yaoyao Ye

Papers

Crosstalk noise and bit error rate analysis for optical network-on-chip

A NoC Traffic Suite Based on Real Applications

3-D Mesh-Based Optical Network-on-Chip for Multiprocessor System-on-Chip

Crosstalk Noise in WDM-Based Optical Networks-on-Chip: A Formal Study and Comparison

A Hierarchical Hybrid Optical-Electronic Network-on-Chip