The Fifth Edition of this academically rigorous text provides a comprehensive treatment of analog integrated circuit analysis and design starting from the basics and through current industrial practices. The authors combine bipolar, CMOS and BiCMOS analog integrated-circuit design into a unified treatment that stresses their commonalities and highlights their differences. The comprehensive coverage of the material will provide the student with valuable insights into the relative strengths and weaknesses of these important technologies.

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Analysis and Design of Analog Integrated Circuits

A digital-domain self-calibration technique, which can directly measure and cancel code errors in multistep conversions, is developed to improve the linearity of multi-step analog-to-digital converters (ADCs). While conventional self-calibration techniques require separate digital-to-analog converters (DACs) for calibration purpose to subtract nonlinearity errors in the analog domain, the proposed digital calibration technique uses add-on digital logic to subtract nonlinearity errors digitally from uncalibrated digital outputs. In a prototype 12-b fully differential two-step ADC implemented using a 2- mu m n-well CMOS technology, this technique cancels MOS switch feedthrough, op-amp offsets, and interstage gain errors simultaneously, and improves total harmonic distortion from -64 to -77 dB. >

Digital-domain calibration of multistep analog-to-digital converters

This paper presents the design of three- and nine-stage voltage-controlled ring oscillators that were fabricated in TSMC 0.18-/spl mu/m CMOS technology with oscillation frequencies up to 5.9 GHz. The circuits use a multiple-pass loop architecture and delay stages with cross-coupled FETs to aid in the switching speed and to improve the noise parameters. Measurements show that the oscillators have linear frequency-voltage characteristics over a wide tuning range, with the three- and nine-stage rings resulting in frequency ranges of 5.16-5.93 GHz and 1.1-1.86 GHz, respectively. The measured phase noise of the nine-stage ring oscillator was -105.5 dBc/Hz at a 1-MHz offset from a 1.81-GHz center frequency, whereas the value for the three-stage ring oscillator was simulated to be -99.5 dBc/Hz at a 1-MHz offset from a 5.79-GHz center frequency.

A 5.9-GHz voltage-controlled ring oscillator in 0.18-/spl mu/m CMOS

A 5.9-GHz Voltage-Controlled Ring Oscillator in 0.18- m CMOS

This paper describes a 16-bit 250 MS/s ADC fabricated on a 0.18 BiCMOS process. The ADC has an integrated input buffer with a new linearization technique that improves its distortion by 5-10 dB and lowers its power consumption by 70% relative to the state of the art. It demonstrates a new background calibration technique to correct the residue amplifier (RA) gain errors and lower its power consumption. This summing node sampling (SNS) calibration technique is based on sampling the summing-node voltage of the residue amplifier and using it with the corresponding residue to estimate the amplifier open loop gain. The ADC achieves an SNDR of 76.5 dB and consumes 850 mW from a 1.8 V supply, while the input buffer consumes 150 mW from a 3 V supply. Up to 125 MS/s, the SFDR is greater than 100 dB for input frequencies up to 100 MHz and 90 dB up to 300 MHz input frequency. At 250 MS/s, the SFDR is greater than 95 dB up to 100MHz and 85 dB up to 300 MHz.

A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration

We introduce a method for designing switching power converter circuits with unified frequency characteristics independent of the input and output voltage settings and the load current change. Each circuit block is expressed as an equivalent small signal transfer function. Stability analysis of the total feedback loop was performed in both the continuous conduction mode (CCM) and discontinuous conduction mode (DCM). In addition, a system and circuit simulation method for switching power converters that enables fast and precise simulation of a transient response and frequency characteristics is introduced. Its features include acceleration of simulation time, and the ability to use a SPICE-like analog simulator and a behavioral simulator at the same time. We conclude that sophisticated circuit design and simulation of switching power converters are now available.

Sophisticated circuit design and simulation method for switching power converters

This paper presents the comparison of sensitivity between the reflection and transmission coefficient by free space method for non-invasive blood glucose monitoring. In this study, aqueous glucose solutions with concentration values of 0, 1, 2, 3, and 4 w/v\% have been tested. The calculation is done using formulas based on a three-layer model. The calculation results are then compared with the simulation results. Both calculation and simulation show almost the same results. The measurement of reflection and transmission coefficient is also implemented by using horn antenna. The results show that transmission coefficient is more sensitive with respect to the change of glucose concentration.

Yasuhiro Sugimoto

Papers

Sophisticated circuit design and simulation method for switching power converters

Sensitivity Comparison Between Reflection and Transmission Coefficient by Free Space Method for Non-Invasive Glucose Monitoring Sensor