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Yvain Thonnart
Researcher at University of Grenoble
Publications - 77
Citations - 1522
Yvain Thonnart is an academic researcher from University of Grenoble. The author has contributed to research in topics: Network on a chip & Asynchronous communication. The author has an hindex of 22, co-authored 71 publications receiving 1314 citations. Previous affiliations of Yvain Thonnart include Commissariat à l'énergie atomique et aux énergies alternatives.
Papers
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Proceedings ArticleDOI
A fully-asynchronous low-power framework for GALS NoC integration
TL;DR: The design of a low-power asynchronous Network-on-Chip which is implemented in a bottom-up approach using optimized hard-macros and achieves a 550Mflit/s throughput on silicon, and exhibits 86% power reduction compared to an equivalent synchronous NoC version.
Journal ArticleDOI
An Asynchronous Power Aware and Adaptive NoC Based Circuit
Edith Beigne,Fabien Clermidy,Helene Lhermet,Sylvain Miermont,Yvain Thonnart,Xuan-Tu Tran,Alexandre Valentian,Didier Varreau,P. Vivet,X. Popon,Hugo Lebreton +10 more
TL;DR: A fully power aware globally asynchronous locally synchronous network-on-chip circuit that can be reduced up to a factor of 8 while the static power consumption is reduced by 2 decades in stand-by mode.
Proceedings ArticleDOI
A 477mW NoC-based digital baseband for MIMO 4G SDR
Fabien Clermidy,Christian Bernard,Romain Lemaire,Jérôme Martin,Ivan Miro-Panades,Yvain Thonnart,Pascal Vivet,Norbert Wehn +7 more
TL;DR: Baseband processing for advanced Telecom applications have to face two contradictory issues: performance demands are exploding and power consumption is decreasing with decreasing power consumption constraints.
Proceedings ArticleDOI
An asynchronous power aware and adaptive NoC based circuit
Edith Beigne,Fabien Clermidy,J. Durupt,Helene Lhermet,Sylvain Miermont,Yvain Thonnart,T.T. Xuan,Alexandre Valentian,Didier Varreau,P. Vivet +9 more
TL;DR: A fully power-aware globally-asynchronous locally-synchronous network-on-chip (NoC) circuit that provides scalable communication and a 17 Gb/s throughput while automatically reducing its power consumption by activity detection.
Journal ArticleDOI
A 460 MHz at 397 mV, 2.6 GHz at 1.3 V, 32 bits VLIW DSP Embedding F MAX Tracking
Edith Beigne,Alexandre Valentian,Ivan Miro-Panades,Robin Wilson,Philippe Flatresse,Fady Abouzeid,Thomas Benoist,Christian Bernard,Sebastien Bernard,O. Billoint,Sylvain Clerc,Bastien Giraud,Anuj Grover,Julien Le Coz,Jean-Philippe Noel,Olivier Thomas,Yvain Thonnart +16 more
TL;DR: This paper describes a 32 bits DSP fabricated in 28 nm Ultra Thin Body and Box FDSOI technology that decreases the core VDDMIN to 397 mV, increases clock frequency and maximum frequency tracking design techniques are proposed for wide voltage range operation.