Z
Zhiru Zhang
Researcher at Cornell University
Publications - 150
Citations - 5104
Zhiru Zhang is an academic researcher from Cornell University. The author has contributed to research in topics: Computer science & High-level synthesis. The author has an hindex of 28, co-authored 122 publications receiving 3561 citations. Previous affiliations of Zhiru Zhang include Xilinx & Nvidia.
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Journal ArticleDOI
High-Level Synthesis for FPGAs: From Prototyping to Deployment
TL;DR: AutoESL's AutoPilot HLS tool coupled with domain-specific system-level implementation platforms developed by Xilinx are used as an example to demonstrate the effectiveness of state-of-art C-to-FPGA synthesis solutions targeting multiple application domains.
Proceedings ArticleDOI
Accelerating Binarized Convolutional Neural Networks with Software-Programmable FPGAs
Ritchie Zhao,Weinan Song,Wentao Zhang,Tianwei Xing,Jeng-Hau Lin,Mani Srivastava,Rajesh Gupta,Zhiru Zhang +7 more
TL;DR: The design of a BNN accelerator is presented that is synthesized from C++ to FPGA-targeted Verilog and outperforms existing FPGAs-based CNN accelerators in GOPS as well as energy and resource efficiency.
Proceedings ArticleDOI
Application-specific instruction generation for configurable processor architectures
TL;DR: A set of algorithms, including pattern generation, pattern selection, and application mapping, are proposed to efficiently utilize the instruction set extensibility of the target configurable processor.
Proceedings ArticleDOI
Reverse engineering convolutional neural networks through side-channel information leaks
TL;DR: This study shows that even with data encryption, the adversary can infer the underlying network structure by exploiting the memory and timing side-channels, and reveals the importance of hiding off-chip memory access pattern to truly protect confidential CNN models.
Proceedings ArticleDOI
An efficient and versatile scheduling algorithm based on SDC formulation
Jason Cong,Zhiru Zhang +1 more
TL;DR: A new scheduler is described that converts a rich set of scheduling constraints into a system of difference constraints (SDC) and performs a variety of powerful optimizations under a unified mathematical programming framework and effectively optimize longest path latency, expected overall latency, and the slack distribution.