Showing papers by "International Rectifier published in 2002"

Digital dimming fluorescent ballast

Abstract: An electronic ballast circuit (15) for powering a gas discharge lamp (26) is networked with other ballast circuits to provide large scale lighting control on a local or remote basis. The ballast has an interface (10) connectable to a standard PC (20) for receiving commands and obtaining query information. The ballasts can be controlled individually or in groups. The ballast control also can download lighting profiles to a microcontroller in the ballast, and can support lighting control protocols including the DALI standard.

Trench FET with self aligned source and contact

Abstract: A trench type power MOSgated device has a plurality of spaced trenches lined with oxide and filled with conductive polysilicon. The tops of the polysilicon fillers are below the top silicon surface and are capped with a deposited oxide the top of which is flush with the top of the silicon. Source regions of short lateral extent extend into the trench walls to a depth below the top of the polysilicon. A trench termination is formed having an insulation oxide liner covered by a polysilicon layer, covered in turn by a deposited oxide.

Electronic dimming ballast for cold cathode fluorescent lamp

Abstract: An electronic ballast for powering a cold cathode fluorescent lamp of an electronic display device comprising: a rectifier coupled to a source of AC power for producing a rectified DC output voltage, a power factor correction circuit receiving the rectified DC output voltage and providing an increased voltage DC bus voltage, an electronic switching circuit comprising at least one electronic switch for switching the DC bus voltage to provide a switched voltage for driving a cold cathode fluorescent lamp, the switched voltage being provided to the lamp through an output stage comprising a resonant LC circuit; and an electronic ballast control circuit for controlling a switching operation of the electronic switching circuit, the electronic ballast being provided in a housing for the electronic display device.

Power mosfet with integrated drivers in a common package

Abstract: A driver stage consisting of an N channel FET and a P channel FET are mounted in the same package as the main power FET. The power FET is mounted on a lead frame and the driver FETs are mounted variously on a separate pad of the lead frame or on the main FET or on the lead frame terminals. All electrodes are interconnected within the package by mounting on common conductive surfaces or by wire bonding. The drivers are connected to define either an inverting or non-inverting drive.

Semiconductor package including two semiconductor die disposed within a common clip

Abstract: A co-package semiconductor device including an outer clip in the form of a metal can includes also two semiconductor dies, at least one of which uses the outer clip as an electrical connector. An inner clip is used to dispose one of the dies within the outer clip. The inner clip may be insulated from the outer clip by an insulating layer.

Resonant converter with phase delay control

Abstract: A phase delay control for a power converter operates with a phase locked loop and current sense feedback to provide improved control stability and dynamic output range. The phase lock loop includes a voltage controlled oscillator that is controlled based on an error signal derived from a phase of the power converter output. The error signal applied to the voltage controlled oscillator produces a shift in switching frequency for the converter to drive the error to zero. The power converter includes an LCC resonant circuit to manipulate resonant electrical energy to improve switching speed and power density.

Termination structure for superjunction device

Abstract: A termination structure for a superjunction device on which the net charge between P pylons in an N − termination region is intentionally unbalanced and is negative. The P pylons in the termination area are further non-uniformly located relative to those in the active area. A field ring which is an extension of the source electrode terminates at a radial mid point of the termination region.

Magnetoresistive magnetic field sensors and motor control devices using same

Abstract: A magnetic field measuring device useful for measuring a magnetic field associated with an electric current, including a bus section connectable into the path of the electric current, a first magnetoresistive (MR) bridge oriented to be sensitive to the magnetic field of a current in the bus section, a second MR bridge oriented to be substantially insensitive to the magnetic field of a current in the bus section, a biasing coil configured and positioned to apply a magnetic field to the first and second MR bridges, whereby the sensitivity of the first MR bridge can be controlled; and a signal processing device responsive to a voltage output of the second MR bridge to control the current through the biasing coil. The device exhibits good rejection of stray magnetic and electric fields, is convenient to use, and can be fabricated in a single chip, with or without associated signal processing and conditioning circuitry, using conventional IC processing techniques.

Dimming ballast for compact fluorescent lamps

Abstract: A fluorescent lamp ballast circuit including a phase cut dimmer connectable to a source of AC power, the selectable phase cut dimmer and an electronic switch having a trigger voltage and a conduction period, when the electronic switch triggers to the end of the half cycle, a rectifying and charging circuit coupled to the output of the phase cut dimmer for providing a DC voltage across a DC bus, a filter circuit receiving the output of said phase cut dimmer and converting the output to a control signal related to the firing angle of the electronic switch; an output stage coupled to the lamp, the output stage having at least one electronic switching device; the ballast control circuit including a control input for changing a frequency of said pulsed power signal, the control input being coupled to said control signal, the control signal varying in accordance with the firing angle of he electronic switch, thereby varying the brightness level of said fluorescent lamp.

Process for counter doping N-type silicon in Schottky device with Ti silicide barrier

Abstract: A Schottky diode has a barrier height which is adjusted by boron implant through a titanium silicide (25) Schottky contact and into the underlying N- silicon substrate (49) which receives the titanium silicide contact. The implant is a low energy, of about 10 keV 'non critical' and a low dose of less than about 1E12 atoms per cm2 'non-critical'.

Electronic dimmable ballast for high intensity discharge lamp

Abstract: A dimmable electronic ballast for an HID lamp includes a rectifier stage for rectifying an AC input and providing a rectified DC output, a power factor correction stage for modifying a power factor of the AC input and for providing an increased voltage DC output from the rectified DC output, an electronic ballast control circuit for providing a driving signal comprising a pulse train for controlling a switching operation of an output switch stage driving the HID lamp; the output switch stage having at least one electronic switching element coupled to the increased voltage DC output for providing a pulsed power signal to the HID lamp to power the lamp, the electronic ballast control circuit having a feedback input comprising a signal related to the power dissipated by the HID lamp for maintaining the power at a desired level, the desired level being set by a dimming control input to the electronic ballast control circuit. The circuit provides high frequency power, typically above 50 kHz, to the HID lamp.

Semiconductor device package with improved cooling

Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom. The metal clip or drain clip has a plurality, a parallel spaced fins extending from its outwardly facing surface.

Current ripple reduction by harmonic current regulation

Abstract: A method and apparatus for regulating a harmonic current component of an inverter fed motor drive system comprises measuring a phase current of the motor, substantially eliminating the fundamental component of the phase current, demodulating the phase current having the fundamental component substantially eliminated to produce a first current signal and providing the first current signal to a PWM control input of an inverter drive of the inverter fed motor drive system to affect the inverter output voltage by driving a first harmonic current of the motor substantially to zero thereby to achieve harmonic current control. More accurate, estimated motor voltages can also be provided by the system.

Novel power MOSFET packaging technology doubles power density in synchronous buck converters for next generation microprocessors

Abstract: This paper introduces a novel power packaging technology developed by International Rectifier. This new packaging technology breaks ground in reducing package related losses and thus allowing designers to develop power supplies capable of meeting the demands of latest generation processors.

Process to create buried heavy metal at selected depth

Abstract: Semiconductor devices having recombination centers comprised of well-positioned heavy metals. At least one lattice defect region within the semiconductor device is first created using particle beam implantation. Use of particle beam implantation positions the lattice defect region(s) with high accuracy in the semiconductor device. A heavy metal implantation treatment of the device is applied. The lattice defects created by the particle beam implantation act as gettering sites for the heavy metal implantation. Thus, after the creation of lattice defects and heavy metal diffusion, the heavy metal atoms are concentrated in the well-positioned lattice defect region(s).

Active common mode filter connected in A-C line

Abstract: An active filter (11) is provided to reduce a common mode current in a pulse width modulating driving circuit. The driving circuit includes a rectifier (10) connected to an AC lines (L1, L2) from an AC source, a PWM inverter (12) having input terminals connected to outputs of the rectifier (10) through a current sensor (13) and output terminals coupled to drive a load (13). The active filter (11) comprises first and second transistors (Q1, Q2) connected in series between the outputs of the rectifier (10) and controlled such that they are alternatively switched between a non-conducting state and a conducting state in a linear region by controlling the control electrodes of the transistors responsive to a sensed current from the current sensor (13). An output node between the transistors is coupled to ground through an isolating capacitor (C).

Wafer level underfill and interconnect process

Abstract: A chip scale package and a method for its manufacture which include providing sticky interconnects (41, 42) on a surface of a semiconductor die (60), the interconnects being surrounded by a layer of thermal epoxy (EO).

Embedded inductor for semiconductor device circuit

Abstract: An embedded inductor which includes a spiral conductive inductor embedded in a magnetically permeable body composed of particles of pre-sintered magnetically permeable (e.g. ferromagnetic) material and an epoxy binder.

Single-stage pfc + ballast control circuit/general purpose power converter

Abstract: Two switching half-bridges (M1-M4) are operated to achieve constant power delivered to a resonant load (25) while achieving a high power factor. A half-bridge (M1, M2) connected to a circuit input draws a sinusoidal current that is in phase with the input voltage to achieve the high power factor. The two half-bridges are composed of two switches each, which are operated to obtain constant load power in satisfaction of calculated conduction angles. Alternatively, the switches are operated on complementary 50% duty cycles to regulate output voltage and shape the input current waveform. Output regulation is achieved by frequency control while input current wave shaping is realized by phase shifts between the two half-bridges.

Defect characterization of 4H-SiC wafers for power electronic device applications

Abstract: Silicon carbide is a semiconductor of choice for the fabrication of high-power, high-temperature and high-frequency electronic devices. Nevertheless, such a material still presents many problems as regards the crystallographic quality and the presence of defects, which influence the device performance. We have investigated 4H-SiC wafers and 4H-SiC epitaxial layers by microscopy and structural techniques in order to obtain information about the defect morphology. The goal of this analysis will be to correlate them with the electrical properties of SiC for power electronic device applications.

Manufacturing process and termination structure for fast recovery diode

Abstract: A termination structure and reduced mask process for its manufacture for either a FRED device or any power semiconductor device comprises at least two concentric diffusion guard rings and two spaced silicon dioxide rings used in the definition of the two guard rings. A first metal ring overlies and contacts the outermost diffusion. A second metal ring which acts as a field plate contacts the second diffusion and overlaps the outermost oxide ring. A third metal ring, which acts as a field plate, is a continuous portion of the active area top contact and overlaps the second oxide ring. The termination is useful for high voltage (of the order of 1200 volt) devices. The rings are segments of a common aluminum or Palladium contact layer.

Wafer level insulation underfill for die attach

Abstract: A process for forming an insulation underfill for soldering semiconductor die solder balls by a solder paste on conductive traces on a support surface The process comprises the screen printing or deposition from a syringe of thermoplastic or thermosetting epoxy columns between the solder balls, to a height equal to the standoff height of the die from the support surface The assembly is first heated to a temperature at which the plastic becomes semifluid and before the area over which it will spread becomes contaminated with flux residue; and is next heated to the solder paste reflow temperature

Superjunction device with improved avalanche capability and breakdown voltage

Abstract: A superjunction device has a plurality of equally spaced P columns in an N- epitaxial layer The concentration of the P type columns is made greater than that needed for maintaining charge balance in the N- epi region and the P columns thereby to increase avalanche energy An implant dose of 11E13 or greater is used to form the P columns

Semiconductor device having clips for connecting to external elements

Abstract: A semiconductor device that has a semiconductor die having at least two opposing major electrodes and a control electrode. Conductive clips, each having a base portion and a contact portion, are connected to respective electrodes at their bases by a respective layer of conductive material. A passivation layer is disposed on at least one of the electrodes and surrounds the layers of conductive material. The base portion and the contact portion of one of the clips are connected by an extension, which extends between the major surfaces of the semiconductor die.

Plural semiconductor devices in monolithic flip chip

Abstract: A flip chip structure contains laterally spaced semiconductor devices such as MOSFETs in a common chip. A deep trench isolates the devices. Contacts are connected to the source drain and gate electrode (or other electrodes) and are interconnected as required for a circuit function either within the chip or on the support board. Ball contacts are connected to the electrodes. The opposite surface of the chip to that in which the devices are formed receives a copper or other metal layer which is patterned to increase its area for heat exchange. The surface of the copper is coated with black oxide to increase its ability to radiate heat.

Intelligent motor drive module with injection molded package

Abstract: A power module having a lead frame with a plurality of power switching devices and a plurality of driving devices mounted thereon. The driving devices control the power switching devices to provide power to a plurality of output leads via first wire bonds. The first wire bonds are substantially parallel to each other between the power switching devices and the output leads. Each power switching device preferably includes a power semiconductor device and a diode, the diodes and power switching devices being interconnected by second wire bonds which are also substantially parallel to each other. The power switching devices preferably comprise bare semiconductor die mounted on the lead frame, the lead frame and power switching devices being enclosed in a molded package. The molded package are preferably formed by transfer-molding or injection-molding.

Back-to-back connected power semiconductor device package

Abstract: A small footprint package for two or more semiconductor die includes first and second die, mounted on opposite respective surfaces of a lead frame pad in vertical alignment with one another. A conductive or insulation adhesive can be used. The die can be identical MOSgated devices connected in series, or can be one power die and a second IC die for the control of the power die.

Surface mounted package with die bottom spaced from support board

Abstract: A semiconductor package according to the present invention includes a metal can which receives in its interior space a MOSFET. The MOSFET so received is oriented such that its drain electrode is facing the bottom of the can and is electrically connected to the same by a layer of conductive epoxy or a solder or the like. The edges of the MOSFET so placed are spaced from the walls of the can. The space between the edges of the MOSFET and the walls of the can is filled with an insulating layer. A surface of the MOSFET is sub-flush below the plane of a substrate by 0.001-0.005 inches to reduce temperature cycling failures.

Circuit for improving noise immunity by DV/DT boosting

Abstract: A circuit for suppressing false operation of a level shift circuit (10) due to a noise transient, the circuit comprising a first transistor (103) coupled to a voltage source (VB) of the level shift circuit and being coupled to pass a current when a noise transient is present on the voltage source and an output terminal (BOOST) coupled to the first transistor providing as an injected signal a current proportional to the current in the first transistor to at least one level shift transistor of the level shift circuit to prevent false triggering of the level shift circuit due to the noise transient.

Passive common mode filter and method for operating a passive common mode filter

Abstract: An electromagnetic interference filter for filtering common mode current in an inverter device, the filter comprising: an inductor coupled in a least one power supply line to the inverter device; the inverter device having a ground return line, a capacitor coupled between the inductor and the ground return line; and a controlled switch coupled in series with the capacitor between the inductor and ground return line, and a control unit controlled in accordance with commutations in said inverter device whereby said switch is turned on when common mode current is drawn by said inverter device and turned off when common mode current ceases substantially to be drawn by said inverter device.