scispace - formally typeset
Search or ask a question

Showing papers by "Teradyne published in 1985"


Journal ArticleDOI
John R. Day1
TL;DR: A fault-driven algorithm that generates all possible repair solutions for a given bit failure pattern in a redundant RAM, able to generate solutions for any theoretically repairable die that would be deemed unrepairable by existing algorithms.
Abstract: This article describes a fault-driven algorithm that generates all possible repair solutions for a given bit failure pattern in a redundant RAM. Benefits of this approach include the ability to select repair solutions based on userdefined preferences (for example, fewest total elements invoked or fewest rows invoked). Perhaps the greatest advantage of this algorithm is its ability to generate solutions for any theoretically repairable die that would be deemed unrepairable by existing algorithms.

138 citations


Patent
19 Nov 1985
TL;DR: A connector assembly for connecting a daughter printed circuit board having an internal ground plane layer to a backplane including a daughter board connector element including a plurality of first signal contacts connected to signal lines near the bottom of the daughter board, the signal contacts extending outward from the surface and downward, and an elongated bus bar aligned for contacting the mating portion is described in this article.
Abstract: A connector assembly for connecting a daughter printed circuit board having an internal ground plane layer to a backplane including a daughter board connector element including a plurality of first signal contacts connected to signal lines on a surface of the daughter board near the bottom of the daughter board, the signal contacts extending outward from the surface and downward, and a ground contact electrically connected to the internal ground plane layer, the ground contact extending along the bottom of the daughter board so as to overlap a plurality of the signal contacts and having an elongated exposed lower contacting portion, and a backplane connector element including a plurality of second signal contacts arranged for mating with respective first signal contacts and an elongated bus bar aligned for contacting the mating portion.

54 citations


Patent
01 Nov 1985
TL;DR: In this article, the authors propose to synchronize adjustable delay circuits for a multiple channel tester by using a timing pulse that has reached the end of a given path in the tester to trigger the following timing pulse of a timing generator, thereby providing oscillating timing pulses having an associated frequency related to the propagation delay associated with the particular path.
Abstract: Quickly synchronizing adjustable delay circuits for a multiple channel tester by using a timing pulse that has reached the end of a given path in the tester to trigger the following timing pulse of a timing generator, thereby providing oscillating timing pulses having an associated frequency related to the propagation delay associated with the particular path, comparing the associated frequency with a reference frequency and adjusting a delay provided in the path until the associated frequency matches a desired frequency.

24 citations


Patent
Walter Phelps Kern1
05 Aug 1985
TL;DR: In this article, a shielding device for spring pins is provided by providing a base having shielding holes, grounding holes, and a trough connecting them with an interconnected covering, providing within the shielding holes insulators with element holes therethrough.
Abstract: A shielding device, as for spring pins, is provided by providing a base having shielding holes, grounding holes, and a trough connecting them with an interconnected covering, providing within the shielding holes insulators with element holes therethrough.

22 citations


Patent
06 May 1985
TL;DR: In this article, a plurality of daughter printed circuit boards are detachably mounted on a backplane and electrically connected to a bus bar on the same side of the backplane via contacts on the daughter boards that mate with contact portions of the bus bar.
Abstract: A plurality of daughter printed circuit boards are detachably mounted on a backplane and electrically connected to a bus bar on the same side of the backplane via contacts on the daughter boards that mate with contact portions of the bus bar.

21 citations


Patent
15 Nov 1985
TL;DR: In this paper, a beam of light is pivoted in one axis about a remote point by providing means for laterally translating the beam and a pivotal reflector and providing control means responsive to the pivotal position of the reflector to cause the means for translating to translate the beam.
Abstract: Pivoting a beam of light in one axis about a remote point by providing means for laterally translating the beam and a pivotal reflector and providing control means responsive to the pivotal position of the reflector to cause the means for laterally translating to translate the beam the amount necessary to cause the light beam from the reflector to be reflected to the remote point.

19 citations


Journal ArticleDOI
A. Jesse Wilkinson1
TL;DR: MIND is an expert system for VLSI test system diagnosis that integrates the principles of their hierarchical design and experts' heuristics to achieve a practical approach to reducing test system downtime.
Abstract: Because of its intended purpose, it is very complicated to diagnose faults in VLSI test system hardware. When this problem is considered in the hardware design phase, it is apparent that VLSI test systems need to have built-in self-test features. For a self-test to be of any value, the circuit check program should minimize the hardware involved in each test. MIND is an expert system for VLSI test system diagnosis that integrates the principles of their hierarchical design and experts' heuristics to achieve a practical approach to reducing test system downtime.

17 citations


Patent
15 Oct 1985
TL;DR: In this article, the difference between two voltages in which a first current proportional to the voltage difference is generated at a first point, and there is circuitry for delivering at a second point a second current that is based on the first current and is indicative of voltage difference.
Abstract: Apparatus for measuring the difference between two voltages in which a first current proportional to the voltage difference is generated at a first point, and there is circuitry for delivering at a second point a second current that is based on the first current and is indicative of the voltage difference; the circuitry includes an uninterrupted current path from the first point to the second point and the current path has a circuit element across which at least a portion of the common mode voltage appears; and the circuit element provides an output current to the path which is independent of the voltage across the circuit element.

12 citations


Proceedings Article
01 Jan 1985
TL;DR: In this article, an applied intelligence program for ATE fault diagnosis shows promise as an effective method to reduce mean time to repair (MTTR) for VLSI test systems, the resources needed to derive that knowledge, the approach implemented to organize it, and the final form of the knowledge representations which resulted from their work are discussed.
Abstract: An applied intelligence program for ATE fault diagnosis shows promise as an effective method to reduce mean time to repair (MTTR). The types of knowledge required by an intelligent diagnostic for VLSI test systems, the resources needed to derive that knowledge, the approach implemented to organize it, and the final form of the knowledge representations which resulted from our work are discussed in this paper.

9 citations



Journal ArticleDOI
Wayne Ponik1
TL;DR: The J967 is the newest of Teradyne's J900 series of VLSI test systems, which provides flxible timing and formating; fact accurate parametric tests; and automatic calibration to devices with fewer than 200 leads and bus speeds of up to 20 MHz.
Abstract: The J967 is the newest of Teradyne's J900 series of VLSI test systems. It provides flxible timing and formating; fact accurate parametric tests; and automatic calibration to devices with fewer than 200 leads and bus speeds of up to 20 MHz. The 36 timing generators and 1024 timing sets reduce the need for multiple passes or multiple programs to test a device. The J967's intergrated software includes the Berkeley 4.2BSD Unix operating system, T900 test language, automatic data loging, a test analysis program, and Testsim, a software simulation of the J967 for offline debuging.


Proceedings ArticleDOI
Jozef H. Hendriks1
24 Jun 1985
TL;DR: In this article, an analysis of the single-ended series resonant power converter reveals characteristics that could make such converters quite popular for domestic and industrial use, which could be used for both commercial and industrial applications.
Abstract: Type power converters generate wave shapes which are basically sinusoidal and exhibit all the advantages associated with sine waves in practical applications. An analysis of the single ended series resonant power converter reveals characteristics that could make such converters quite popular for domestic and industrial use.