Showing papers in "IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part A in 1996"
TL;DR: In this article, a methodology for determining modular products while considering cost and performance is developed, where a rule-based fuzzy representation of the module development problem is presented, while the tradeoff between performance and cost of modules is analyzed by a fuzzy neural network approach.
Abstract: Modular products refer to products, assemblies, and components that fulfill various functions through the combination of distinct building blocks. As companies strive to rationalize engineering design, manufacturing, and support processes and to produce a large variety of products at lower costs, modularity is becoming a focus. However, modularity has been treated in the literature at an abstract level, and it has not been satisfactorily explored in industry. Furthermore, the modular technology in electronics such as multichip modules (MCMs) aims at decreasing the average spacing between integrated circuits rather than increasing the variety of product characteristics of other types of designs. This paper develops a methodology for determining modular products while considering cost and performance. To interpret various types of modularity such as component-swapping, component-sharing, and bus modularity, a graphical representation of the product modularity is presented, while the module components of a product set are determined by a heuristic approach. With the module components known, a rule-based fuzzy representation of the module development problem is presented, while the tradeoff between performance and cost of modules is analyzed by a fuzzy neural network approach. The approach is illustrated with the example of an MCM.
186 citations
TL;DR: In this article, an extension of the constant angle heat spreading, taking into account chip and substrate dimensions, and changing the spreading angle accordingly, yields to closed form expressions accurate enough for most practical applications.
Abstract: The model presented in this work is based on an extension of the constant angle heat spreading, taking into account chip and substrate dimensions, and changing the spreading angle accordingly. This yields to closed form expressions accurate enough for most practical applications. Circular, square, and rectangular geometries have been analyzed and the results compared with Bessel and Fourier series-like solutions.
92 citations
TL;DR: The 6H-SiC buried-gate n-channel depletionmode junction field effect transistors (JFETs) were used in a hybrid temperature monitoring circuit (tested from -196/spl deg/C to 500/spl/C) fabricated at Auburn University for use in numerous industrial applications.
Abstract: 6H-SiC buried-gate n-channel depletion-mode junction field-effect transistors (JFETs) were characterized from 25/spl deg/C to 350/spl deg/C in terms of transconductance (g/sub m/), pinchoff voltage (V/sub P/), output resistance (r/sub o/), input resistance (R/sub in/), drain-to-source current at zero gate-to-source voltage (I/sub DSS/), gate-to-source reverse biased leakage current (I/sub GSS/), off-state drain-to-source current (I/sub DSS(off)/), and noise power spectral density (S/sub V/). The 6H-SiC JFET's were used in a hybrid temperature monitoring circuit (tested from -196/spl deg/C to 500/spl deg/C) fabricated at Auburn University for use in numerous industrial applications. Simulation program with integrated circuit emphasis (SPICE) simulations of the temperature monitoring circuit's output voltage corresponded well with measured data as a function of temperature. Linear regression (LR) analysis of measured data revealed a notably sensitive (/spl sim/2.3 mV//spl deg/), and an eminently linear (correlation coefficient =-0.0996...over 25/spl deg/C to 500/spl deg/C range) relationship between the measured output voltage and temperature. Below -50/spl deg/C, the output became nonlinear, presumably from carrier freeze-out effects. To the best of our knowledge, this represents the first successful implementation of SiC active devices into a temperature sensor which demonstrated stable operation up to 500/spl deg/C.
87 citations
TL;DR: The mode I chevron notch fracture toughness of Cu/63Sn-37Pb solder joints was measured as a function of solid state copper-tin intermetallic growth at the solder/copper interface as discussed by the authors.
Abstract: The mode I chevron notch fracture toughness of Cu/63Sn-37Pb solder joints was measured as a function of solid state copper-tin intermetallic growth at the solder/copper interface. Soldered chevron notched bend samples were aged in a furnace at 170/spl deg/C to promote the intermetallic growth and the samples were tested at room temperature after 1, 3, 10, 30, and 75 days of growth. The total thickness of the interfacial intermetallic layer and the individual thicknesses of the component Cu/sub 6/Sn/sub 5/ and Cu/sub 3/Sn layers were monitored at each stage. The chevron notch fracture toughness is correlated with the intermetallic layer thickness measurements and the fracture surface morphology. The results show that at a total intermetallic layer thickness below 5 /spl mu/m, failure is dominated by microvoid coalescence in the solder, and intermetallic growth has little effect on the fracture toughness. At a total thickness exceeding 7 /spl mu/m, however, fracture occurs by cleavage of the interfacial intermetallic particles and the fracture toughness decreases steadily as the intermetallic layer thickness increases. With a total intermetallic layer thickness of 19 /spl mu/m, the chevron notch fracture toughness is only 30% of that measured for an as-soldered, nonaged solder joint.
82 citations
TL;DR: In this article, a wafer through-hole technique with a high vertical wiring density is introduced compatible with standard semiconductor processes, where the basic idea is to realize metallic interconnection lines on the inclined sidewalls of anisotropic etched through-holes in (100) oriented silicon substrates.
Abstract: A novel wafer through-hole technique with a high vertical wiring density is introduced compatible with standard semiconductor processes. The basic idea is to realize metallic interconnection lines on the inclined sidewalls of anisotropically etched through-holes in (100) oriented silicon substrates. The key process is the application of an electrodeposited photoresist capable of covering such complex three-dimensional structures. Further, conventional deep ultraviolet light exposure enables photolithography on the inclined sidewalls with a good resolution, Interconnections have been achieved with line widths of 20 /spl mu/m enabling wiring densities up to 250 cm/sup -1/.
64 citations
IBM1
TL;DR: Moire interferometry is proposed as a tool for the coefficient of thermal expansion (CTE) measurement of electronic packaging components as mentioned in this paper, which can produce the overall CTE and the local CTE across the entire component with high accuracy.
Abstract: Moire interferometry is proposed as a tool for the coefficient of thermal expansion (CTE) measurement of electronic packaging components. The method is a whole-field displacement measurement technique with a sub-micron sensitivity, which can produce the overall CTE and the local CTE across the entire component with high accuracy. The large dynamic range of the method makes it compatible with CTE evaluation of a broad range of components. Two experimental procedures are suggested for 1) CTE over a fixed temperature range and 2) CTE as a function of temperature. The procedures are implemented for various thin small outline packages (TSOPs) a plastic ball grid array (PBGA) package, and a stacked memory cube. The results emphasize the importance of a whole-field measurement technique. A supplementary thermo-mechanical analyzer (TMA) test on an aluminum alloy is conducted and the results are compared with a Moire measurement to discuss the accuracy of the proposed measurement procedure.
64 citations
TL;DR: In this paper, the influence of microstructure of CuCr contact materials on dielectric strength in a vacuum was investigated, and the effect of conditioning of breakdown to increase the strength of the contact surface was shown.
Abstract: The influence of microstructure of CuCr contact materials on dielectric strength in a vacuum is investigated. Experimental results show that breakdown selectively occurs on dielectrically weak phases. For the Cu50Cr50 alloy, it first takes place on Cr particles, and for the CuCr50Sel alloy, on the Cu/sub 2/Se phase. As a result of conditioning of breakdown, the dielectric strength of these phases increases, and breakdown occurs simultaneously. Breakdown roughens the surface of the cathode, but produces a small melt layer on the surface which has much finer microstructures and more homogeneous microcompositions. The effect of conditioning of breakdown to increase dielectric strength, according to the present work, is to produce much finer microstructures and more even micro-compositions on the contact surface.
46 citations
TL;DR: In this article, surface analysis methods are used, scanning electron micrographs reveal distinct structures and areas on the contact surface, and elemental analysis (EDS) shows migration of metal species with current.
Abstract: Break operation studies have been conducted upon Ag/CdO and Ag/SnO/sub 2/ contact materials under dc conditions between 1-16 A. The apparatus used allows contact materials to be continually tested with a controlled break velocity. Results are presented on erosion data in terms of mass transfer. Surface analysis methods are used, scanning electron micrographs reveal distinct structures and areas on the contact surface, and elemental analysis (EDS) shows migration of metal species with current. The metal-oxide used in the contact is shown to influence the arc and erosion characteristics of break only operations. The Ag/CdO contacts exhibit lower erosion than Ag/SnO/sub 2/ contacts under these controlled conditions.
44 citations
TL;DR: In this paper, the authors describe the mounting of commercial 1 W laser diodes soldered on chemical vapor deposition (CVD) diamond heatsinks using Au(80)Sn(20)-solder.
Abstract: This work describes the mounting of commercial 1 W laser diodes soldered on chemical vapor deposition (CVD) diamond heatsinks using Au(80)Sn(20)-solder. With a standard heatsink metallization, the laser diode suffers under high stress. This can be seen in the power-current characteristic and the spectrum as well as in the near and farfield beam pattern, With a modification of the heatsink metallization layer, it was possible to obtain a reproducible mounting process. We compare the electrical and optical characterization of the typical standard heatsink metallization with the modified metallization. So we are able to qualify the mechanical stress in the laser diode. For a better understanding of the modified metallization SEM and EDX analyses are performed. For the quantification of the stress an analytical model is used to compute the maximal shear, tensile, and peel stress. Furthermore, the quality of the bond interface is investigated with high resolution X-ray microscopy. No voids are found. Additionally, the results of a standard burn-in and the first accelerated aging tests to prove the reliability are presented.
41 citations
TL;DR: In this article, the authors analyzed the energy release rate in fracture mechanics in plastic packages of surface mount technology (SMT) and found that the propagation direction of the package crack is dependent on the location of the delaminated interface from which the package cracks originates and the loading type imposed on the package, and that the influence of various parameters on package cracks are largely dependent on loading type.
Abstract: Various package cracks observed in service, with different locations and propagation directions, in plastic packages of surface mount technology (SMT) are analyzed in terms of the energy release rate in fracture mechanics. It has been reported that the types of the cracks observed in the package depend on the chip size, relative thickness of the epoxy resin on the chip and under the chip pad, properties of the materials and the adhesion strength of the interfaces in the package. The stress derived from the thermal expansion mismatch of the materials during the temperature cycling and the pressure induced by the expansion of moisture absorbed in the package at soldering temperature are considered separately in estimating the effects of various parameters on the package cracks. As a result of the analysis, we find that the propagation direction of the package crack is dependent on the location of the delaminated interface from which the package crack originates and the loading type imposed on the package, and that the influence of the various parameters on the package cracks are largely dependent on the loading type. Some results of the analysis are compared with the experimental results.
40 citations
TL;DR: In this article, the two-port network theory can be extended to three-dimensional conductive heat transfer in multilayered plane structures and the authors show how to build efficient computation tools by implementing this theory with help of fast Fourier transform (FFT) algorithms.
Abstract: This paper recalls how the two-port network theory can be extended to three-dimensional (3-D) conductive heat transfer in multilayered plane structures. Then it is shown how to build efficient computation tools by implementing this theory with help of fast Fourier transform (FFT) algorithms. These tools are particularly well-suited for the rapid thermal analysis of power components or hybrid and integrated power circuits. An illustration is given concerning thermal analysis of an insulated gate bipolar power transistor (IGBT) power module and computed results are compared with experiment.
TL;DR: In this article, an experimental setup was used to rapidly assess the moisture sensitivity of plastic encapsulated microcircuits and classify them based on The Institute for Interconnecting and Packaging Electronics Circuits (TPC) and Joint Electron Device Engineering Council (JEDEC) guidelines.
Abstract: A potential reliability problem in plastic encapsulated microcircuits is moisture-induced popcorning, which can arise during the reflow process. This article describes an experimental setup that is used to rapidly assess the moisture sensitivity of plastic encapsulated microcircuits and classify them based on The Institute for Interconnecting and Packaging Electronics Circuits (TPC) and Joint Electron Device Engineering Council (JEDEC) guidelines. Experimental results are then presented which show that only one of the three reflow cycles specified as part of the current guidelines is necessary. The study then presents the role played by the die and die attach material in popcorning, Finally, this study suggests an alternate technique to deter popcorning-the use of optimum temperature ramp rates in board assembly.
TL;DR: In this paper, the influence of the opening speed, current, and loads on arc duration was determined, and it was found that inductive load causes high voltage and gaseous arc phase development as was confirmed by spectra emission of surrounding gas N/sub 2/.
Abstract: Switches and relays connected to complex circuits (motor, resistance, and lamp) and supplied by 14 V dc imposed by the battery voltage are currently used in the automobile field. Arc duration and subsequent erosion measurements for contacts made of pure silver, silver alloys (AgNi, AgCu), and silver metal-oxides (AgCdO, AgSnO/sub 2/) were carried out. Also, the influence of the opening speed, current, and loads on this duration is determined. It was found that inductive load causes high voltage and gaseous arc phase development as was confirmed by spectra emission of surrounding gas N/sub 2/. So, arc duration is enhanced but keeps the same values for silver alloys as well as for silver metal oxides. Nevertheless, in resistive and lamp loads, the metal oxide materials show large arc duration compared to pure silver or silver alloys. Opening speed acts on arc duration differently for each load: it decreases as root square of opening speed in the inductive load whatever the current, but follows a linear decrease at high current in the resistive case. The lowest erosion and mass transfer observed in resistive and lamps loads are reversed and enlarged when the load becomes inductive. We report the remarkable minimum erosion of AgSnO/sub 2/ when loads are free from inductance. These results associated with measurements of erosion will be useful to choose contact material, electrical and mechanical conditions to improve lifetime and reliability of the components.
TL;DR: In this article, the growth process of interfacial contact between wire surface and lead frame is analyzed, and the size limit of wire bonding, taking into account the perimeter bonding mechanism, is discussed.
Abstract: Wire deformation processes during thermocompression bonding without ultrasonic vibration are simulated by a numerical model which is based on the finite-element (FE) technique. The growth process of interfacial contact between wire surface and lead frame is also analyzed. If the contact interface is fixed, then the lateral wire surface expands simultaneously with folding to the lead frame, producing the perimeter bond. On the other hand, if the contact interface can slide, the center of contact area largely expands and the lateral wire surface does not extend, It follows that the interfacial contact area tends to be fixed, but does not slide when the perimeter bond is produced, even if a strong metallic bond is not achieved at the center. A wire reduction greater than 0.5 is required for ensuring the strong perimeter bond formation. This is supported by the experimental results. The interfacial contact area is governed mainly by the wire reduction. If the reduction is kept constant, then the tool with a groove increases the contact area somewhat larger than the flat tool, although the groove tool decreases the rate of wire deformation. We further discuss the size limit of wire bonding, taking into account the perimeter bonding mechanism.
TL;DR: In this paper, the effect of the initial cathode shape has no effect on cathode erosion for tungsten cathodes, but the thorium is depleted from the cathode spot due to fast evaporation, which increases the work function of the cathodes.
Abstract: Arc-cathode erosion has been studied fur pure tungsten and 2% thoriated tungsten cathodes. Measurements of cathode temperature distributions with high spatial resolution have been carried out using an optical multichannel analyzer (OMA)/spectrometer system. The cathode spot behavior has been observed with a tele-microscope and a high speed vision system simultaneously with the temperature measurement. Cathodes have been examined by scanning electron microscope (SEM) and energy dispersive x-ray spectrometer (EDX) after arcing. The results show that the initial cathode shape has no effect on cathode erosion for tungsten cathodes because the major erosion mechanism of tungsten cathodes is the ejection of molten cathode material. For 2% thoriated tungsten cathodes, the cathode geometry has little effect on the cathode tip temperature but plays an important role in the erosion. The thorium is depleted from the cathode spot due to fast evaporation, which increases the work function of the cathode. Deposition of thorium and tungsten crystals at the cathode surface outside of the cathode spot occurs. The conclusions with respect to cathode design are that steep temperature gradients resulting from overcooling should be avoided, and that an optimization of the thermionic emitter needs to take into account both a low work function and an appropriate diffusion rate in the metal matrix.
TL;DR: In this article, a new approach is proposed to reduce the kinetic energy of the moving contact by controlling the strength of the field flux by timing coil energization periods, and the results show that bounce duration and the number of bounces in the latter case are 2-3 times greater.
Abstract: This paper presents studies into the reduction of electrical contact bounce for both a commercial contactor and a contactor model from a new approach. The new approach is based on the reduction of the kinetic energy of the moving contact. This is achieved by controlling the strength of the field flux by timing coil energization periods. A set of data is obtained from the measurement of contact bounces for a current of 10 A dc and an operating voltage of 40 V for conditions with and without the control circuit. The results show that bounce duration and the number of bounces in the latter case are 2-3x greater. Scanning electron microscope (SEM) photographs of the anode and cathode electrodes show, with an uncontrolled coil, contacts that suffer higher are erosion losses.
TL;DR: In this article, a review of the various methods by which a 3D surface profile can be measured, and numerical techniques are described which can be used to analyze electrical contacts to define erosion in terms of volume and height changes.
Abstract: Three-dimensional surface profiling is a useful technique for the evaluation of electrical contact erosion. A review is given of the various methods by which a 3-D surface profile can be measured, and numerical techniques are described which can be used to analyze electrical contacts to define erosion in terms of volume and height changes. Experimental data on the rate of change of mass of Ag-CdO contacts are used to compare with volume and height changes over a number of switching cycles. Emphasis is given to the evaluation of 3-D surface profile in the particular condition where the change of mass of the contacts is nearly zero after a large number of break only switching cycles, and it is shown that in this condition the contacts exhibit volume changes both above and below the datum surface of a new contact.
TL;DR: In this article, the effect of viscous damping on the stopping distance and the maximum acceleration (deceleration) of a one-degree-of-freedom linear system subjected to a shock load during accidental drop or drop tests is evaluated in application to packaging of electronic products.
Abstract: The effect of viscous damping on the maximum displacement ("stopping distance") and the maximum acceleration (deceleration) of a one-degree-of-freedom linear system subjected to a shock load during accidental drop or drop tests is evaluated in application to packaging of electronic products. We show that the dynamic response of such a system depends on the magnitude of the parameter /spl eta/=R/2/spl radic/(KM), where M is the mass of the system, K is its spring constant, and R is the coefficient of damping. We found that the "stopping distance" always decreases with an increase in damping, and that the effect of damping is larger for low level damping. As to the maximum acceleration (deceleration), it has a minimum, when the parameter /spl eta/ is about 0.265. This minimum is about 81% of the maximum acceleration in the undamped system. For /spl eta/=0.5, the maximum acceleration is equal to that for an undamped system, and then increases linearly with an increase in the parameter /spl eta/. Maximum accelerations occur, as a rule, earlier than maximum displacements. Only in a system without damping both the maximum acceleration and the maximum displacement take place simultaneously, after a quarter period from the beginning of the oscillations. For /spl eta//spl ges/0.5, the maximum accelerations take place at the initial moment of time. We conclude that application of "smart" materials, characterized by high energy absorption due to elevated viscous damping, should be carried out with care and with consideration of the system's mass and spring constant, otherwise the resulting acceleration (deceleration) can be even higher than that in an undamped system. Although actual electronic products can be substantially different from one-degree-of-freedom linear systems, it is the author's belief that even the over-simplified case, examined in this paper, provides useful insight into the problem in question.
TL;DR: In this paper, the wear of the copper-graphite brush sliding against the copper commutator under commutation arcs in gasoline and air was reported, and it was made clear that the brush wear in gasoline was more severe than that in air on both polarities when the commutation current was set to 10 A including arcs.
Abstract: The dc motor for an automotive fuel pump has a distinctive feature in that its commutation is carried out in a gasoline environment. The study of brush wear under commutation is generally important from the point of view of its reliability and durability. In this paper, the wear of the copper-graphite brush sliding against the copper commutator under commutation arcs in gasoline and air is reported. It was made clear that the brush wear in gasoline was more severe than that in air on both polarities when the commutation current was set to 10 A including arcs. In order to make the influence of arcs clear on the brush wear, we also examined the brush wear with load current but no arcing and the material transfer in switching contacts with arcing, which gave us the information of electrical erosion. In addition, we analyzed worn brush surfaces after these tests with scanning electron microscopy (SEM) and electron probe microanalysis (EPMA). As a result, the arc has a serious influence on the brush wear in both environments, but how to erode the brush surface by arcing in gasoline is different from that in air.
TL;DR: In this article, contact resistance characteristics of a micro relay with Au(90 wt%)-Ag(10 wt%), cladded contacts were examined in air containing silicone vapor, and in air mixed with the silicone vapor and high humidity.
Abstract: Contact resistance characteristics of a micro relay with Au(90 wt%)-Ag(10 wt%) cladded contacts were examined in air containing silicone vapor and in air mixed with the silicone vapor and high humidity. Electrical conditions for resistive loads of the contacts were covered with four regions such as bridge region, the first micro-arc region, the second micro-arc region, and arc region. Concentrations of the silicone vapor were selected: 1300 ppm which gives saturation of the vapor and 7 ppm which is the safety level for the contact reliability. Moreover, the effect of humidity on dynamic contact resistance characteristics in the silicone environment was also studied. As a result, a boundary of occurrence of contact failure in a relationship between voltage and current was found. This boundary was given by a certain electrical power. The number of operations to failure was found to be inversely proportional to electric power. Under condition of high humidity, low contact resistance maintained longer operation time than low humidity.
TL;DR: In this article, the performance limits of electrical fiber brushes are assessed by means of an expanded, refined theory, and a set of 64 fiber brushes in a homopolar motor at the U.S. Navy Annapolis Laboratory, at /spl nu/=7.6 m/s velocity and j=1 MA/m/sup 2/ the electric loss was 0.026 W/A.
Abstract: The performance limits of electrical fiber brushes are assessed by means of an expanded, refined theory. Measurements back to 1979 are in accord with the theory, including 1993 measurements on a set of 64 fiber brushes in a homopolar motor at the U.S. Navy Annapolis Laboratory, At /spl nu/=7.6 m/s velocity and j=1 MA/m/sup 2/ the electric loss was 0.026 W/A, and after a 20 h test the brushes showed no detectable wear. On the other end of the scale, electrical brushes are being developed for a maglev train system (American Maglev Tech of Florida, Inc.) to operate up to 150 m/s. According to the theory, this will be possible in the open atmosphere with dimensionless wear rates smaller than 10/sup -8/ at current densities up to a few MA/m/sup 2/. At speeds to 300 m/s, projected losses may range up to 4.3 W/A at flash temperatures at and below 100/spl deg/C. The newest fiber brushes preserve the high contact spot density at the ends of individually flexible fibers, independent of amount of wear. Correspondingly, with 10 cm long brushes, for example, the projected maglev brushes should last at least for a New York-Los Angeles return trip. Also, on account of the changed method of construction, manufacturing costs have decreased by more than a factor of ten in the past two years. Prospects are that with industrial manufacturing techniques the cost of fiber brushes, based on ampere hours conducted, will become easily competitive with monolithic graphite brushes. Pending further practical experience, it is therefore expected that: (1) metal fiber brushes will expand the range of sliding brush applicability and (2) ultimately displace graphite brushes for most of their present applications.
TL;DR: Representation of IDEF3 models as reliability graphs, generation of the minimal path and cut sets of ID EF3 models with a path tree algorithm, and reliability analysis of IDef3 models are the issues discussed in this paper.
Abstract: The integration definition (IDEF) methodology has been extensively used for modeling of various processes. Reliability analysis of IDEM models is of interest to practitioners and researchers for several reasons. It identifies critical activities in the process, improves the process performance, and decreases downtime and operating cost of the process. This paper extends the system reliability evaluation techniques, i.e., the system reduction approach and minimum path and cut sets method for reliability evaluation of IDEF3 models. Representation of IDEF3 models as reliability graphs, generation of the minimal path and cut sets of IDEF3 models with a path tree algorithm, and reliability analysis of IDEF3 models are the issues discussed in this paper. An algorithm for computing reliability of an IDEF3 model from a path set-activity incidence matrix is also presented.
TL;DR: In this paper, a probe card mounted with vapor-liquid-solid (VLS) grown silicon whiskers has been produced, which has the potential to be used as a narrow-pitch, high pad-count probe card with more than 300 probe pins.
Abstract: Probe cards mounted with vapor-liquid-solid (VLS) grown silicon whiskers have been produced. In this development the "mesa method", in which VLS whiskers are grown on silicon mesas topped with gold hats, has been successfully introduced which allows accurate positioning of the VLS whiskers. The VLS whisker grows vertically to over 2000 /spl mu/m in length and a diameter of 10-100 /spl mu/m has been obtained. The metal-plated whisker has enough compliance with the overdrive capability of up to 400 /spl mu/m to compensate for the prober error and the possible irregularity of the wafer surface which maintains reliable contact. Two fabrication methods to accomplish the wiring of the VLS whiskers onto the card assembly are proposed. One method is to transfer the VLS whiskers onto a patterned substrate after encapsulating in a transfer media, the other is to grow the VLS whiskers on a patterned silicon-on-insulator (SOI) wafer. The design concept of the whisker probe pins is also proposed. The card has the potential to be used as a narrow-pitch, high pad-count probe card which has more than 300 probe pins which are less than 50 /spl mu/m in pitch. The card obtained by the SOI process has potential application as a wafer level burn-in (WLBI) card with the same thermal expansion coefficient as a silicon wafer. Patterning on a SOI wafer enables a possible low-impedance transmission line in a high speed circuit.
TL;DR: In this article, a thermal modeling procedure has been developed to calculate the temperature distribution of components in complex three-dimensional switches and relays, where the knowledge of electrical a-spot is used to estimate solid-solid contact area and void area.
Abstract: A thermal modeling procedure has been developed to calculate the temperature distribution of components in complex three-dimensional (3-D) switches and relays. The methods developed for dissecting the components, treating of thermal interaction among the components, and calculating of interface thermal resistance are reported. In particular, the knowledge of electrical "a-spot" is used to estimate solid-solid contact area and void area. The void areas do not contribute to electrical conductivity but do contribute to thermal conductivity. The method is used to more accurately estimate the interface thermal resistance which is very important in any thermal analysis program. Actual switches and relays were modeled using finite difference thermal analysis, and the results matched well with measured temperatures.
TL;DR: In this article, a mathematical model of contact opening is described, which includes, phenomena in separating contacts before there is melting, as well as appearance, evolution, and rupture of the liquid metal bridge, the arc ignition and spreading in the bridge metallic vapors until the transformation of the metallic arc phase into a gaseous one.
Abstract: Consecutive stages of contact opening are described by the mathematical model. It includes, phenomena in separating contacts before there is melting, as well as appearance, evolution, and rupture of the liquid metal bridge, the arc ignition and spreading in the bridge metallic vapors until the transformation of the metallic arc phase into a gaseous one. The calculation of life, time, and energy of each stage, contact voltage, temperature, and other extent will compare with experimental data obtained by Takagi and Hang. It is shown, that arc duration depends on opening velocity, contact scale roughness, energy, and length of liquid bridge.
TL;DR: In this article, a finite element structural model is developed to predict the thermomechanical behavior of printed circuit board (PCB) assemblies during infrared reflow soldering, which predicts the amount of board warpage, the effects of increased PCB assembly stiffness resulting from the solder joint formation, and the size of gaps generated at the module lead solder pad interface.
Abstract: A finite element structural model is developed to predict the thermomechanical behavior of printed circuit board (PCB) assemblies during infrared reflow soldering. Specifically, the model predicts the amount of board warpage, the effects of increased PCB assembly stiffness resulting from the solder joint formation, and the size of gaps generated at the module lead solder pad interface. In this paper, quantitative estimates of these process-induced variables are provided as well as a description of the approach used for the analyses.
TL;DR: In this paper, a commercial contactor and a model switch were used to simulate both make and break operations with the same parameter values occurring in modern contactors, but in a much better reproducible way, and with the opportunity to vary the single parameter values in order to gain information about its influence on the erosion behavior.
Abstract: Make-only erosion, break-only erosion, and the combined make-and-break erosion of contacts made from powder metallurgically produced Ag/CdO and three differently produced Ag/SnO/sub 2/ materials were investigated employing both a commercial contactor and a model switch The test conditions were chosen according to IEC H947-4 AC3 duty, yielding make and break are energies of the same order of magnitude The model switch simulates both make and break operations with the same parameter values occurring in modern contactors, but in a much better reproducible way, and with the opportunity to vary the single parameter values in order to gain information about its influence on the erosion behavior Make-only erosion tests demonstrated that Ag/SnO/sub 2/ materials suffered either three times higher or about 50% lower erosion losses than Ag/CdO depending on the manufacturing process and/or the additives of the materials Therefore, the structure of the materials rather than the kind of the main metal oxide component (CdO or SnO/sub 2/) is decisive The combined make-and-break tests yielded significantly lower erosion rates than make-only tests This unexpected result was reproducible for all contact materials investigated, although the are energy per operation was more than doubled due to the additional break operation Inspection of the micro-structure of the stressed contacts suggested that this reduction of the erosion rates is due to the motion of the break are and its effect on the eroded surfaces
TL;DR: In this paper, the suitability of a combined experimental and computational methodology for system-level electronic packaging thermal design was examined and the best configuration based on model study was experimentally examined and provided maximum surface temperature reduction of 56%.
Abstract: The present study examines the suitability of a combined experimental and computational methodology for system-level electronic packaging thermal design. A 48.3 cm (19 in), twenty-slot, fully populated commercial-off-the-shelf (COTS) electronic equipment chassis was studied experimentally and computationally. The experimental program involved detailed component surface temperature measurements for system power levels of 423 and 846 W (21 and 42 W/module) and for volumetric flow rates between 0.05 and 0.14 m/sup 3//s. The experimental configuration was also computationally simulated and the predicted component temperatures agreed well with the experiments. The effects of various baffle configuration designs within the inlet plenum were then computationally analyzed for improved thermal performance. The best configuration based on the model study was experimentally examined and provided maximum surface temperature reduction of 56%.
TL;DR: In this paper, a study of barrier coatings and a chromating treatment with the objective of identifying those characteristics which improve the performance of the contact finish (Au plate and Au flashed Pd, both on a Ni underplate).
Abstract: There is considerable interest in the corrosion control and lubrication of separable electronic connectors and other contact-containing devices. This originates in the desire to minimize the use of costly precious metals, like gold, palladium, and their alloys, without sacrifice in reliability. When the application is in aggressive environments, pore corrosion of the finish limits the reliability of the connector. Also, there may be many engagements and separations of the connector during its lifetime which can result in a wearing out of the noble metal plating. Numerous surface treatments have been proposed for corrosion control, including barrier coatings which restrict access of air to the contact, and chemical modifications of the finish such as chromating. This paper is a study of barrier coatings and a chromating treatment with the objective of identifying those characteristics which improve the performance of the contact finish (Au plate and Au flashed Pd, both on a Ni underplate). Polyphenylether-microcrystalline wax mixtures were used in a laboratory modeling study where the oil-wax ratio and the coating thickness were varied. Performances in a corrosive, high-humidity environment, in wear, and during fretting (with the additional variable of surface roughness) were determined. It was found that Au finishes, even as thin as 0.1 /spl mu/m, when treated with suitable coatings can approach the corrosion performance of much thicker platings.
TL;DR: In this article, a computational fluid dynamics simulation was used to determine the airflow and air temperatures at the system and board levels, and a heat sink was chosen based on estimated thermal requirements and then characterized experimentally under similar flow and geometry conditions.
Abstract: Passive heat sinks for cooling the PowerPC 620 microprocessor in a multiprocessor computer system were analyzed. A computational fluid dynamics simulation was used to determine the airflow and air temperatures at the system and board levels. A heat sink was chosen based on estimated thermal requirements and then characterized experimentally under similar flow and geometry conditions found in the system. Data from the simulation and experiments was then combined to calculate junction temperature. Results show the microprocessor junction temperature can be maintained below 85/spl deg/C for a 25 W heat dissipation and 101/spl deg/C for a 30 W heat dissipation.