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Proceedings ArticleDOI

A 16-context Optically Reconfigurable Gate Array

TLDR
This paper presents the fastest 317–657 ns reconfiguration demonstration of a 16-context optically reconfigurable gate array architecture.
Abstract
Demand for fast dynamic reconfiguration has increased since dynamic reconfiguration can accelerate the performance of processors. Dynamic reconfiguration has two important prerequisites: fast reconfiguration and numerous reconfiguration contexts. Unfortunately, fast reconfigurations and numerous contexts share a tradeoff relation on current VLSIs. Therefore, optically reconfigurable gate arrays were developed to resolve this dilemma. Optically reconfigurable gate arrays can realize a large virtual gate count that is much larger than those of current VLSI chips by exploiting the large storage capacity of a holographic memory. Furthermore, optically reconfigurable gate arrays can realize rapid reconfiguration using large bandwidth optical connections between a holographic memory and a programmable gate array VLSI. This paper presents the fastest 317–657 ns reconfiguration demonstration of a 16-context optically reconfigurable gate array architecture.

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Citations
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Dissertation

Design and implementation of a reliable reconfigurable real-time operating system (R3TOS)

Xabier Iturbe
TL;DR: The developed solution in this thesis is named as R3TOS, which stands for Reliable Reconfigurable Real-Time Operating System, which defines a flexible infrastructure for reliably executing reconfigurable hardware-based applications under real-time constraints.
Proceedings ArticleDOI

Dependability-increasing technique for a multi-context optically reconfigurable gate array

TL;DR: This paper presents a proposal of a more advanced dependability-increasing technique on a multi-context ORGA that can raise the ORGA's level of configuration dependability even further by exploiting multi- context implementation.
Proceedings ArticleDOI

Four-configuration-context optically reconfigurable gate array with a MEMS interleaving method

TL;DR: A proposal of more advanced technique by which one mirror can address four configuration contexts by controlling the mirror angle, which contributes to the miniaturization of an ORGA package and to weight reduction.
Proceedings ArticleDOI

High Speed -- Low Power Optical Configuration on an ORGA with a Phase-modulation Type Holographic Memory

TL;DR: This paper presents a high-speed -- low-power optical configuration capability of an ORGA with a phase-modulation type holographic memory.
Proceedings ArticleDOI

Novel dynamic module multiple redundancy for optically reconfigurable gate arrays

TL;DR: A novel dynamic module multiple redundancy scheme that can increase the robust capabilities of a gate array on an ORGA, which is an extremely robust multi-context programmable device that is robust against space radiation in terms of its configuration data.
References
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Proceedings ArticleDOI

A time-multiplexed FPGA

TL;DR: The architecture of a time-multiplexed FPGA is described, which includes extensions for dealing with state saving and forwarding and for increased routing demand due to time- multiplexing the hardware.
Proceedings ArticleDOI

The design and implementation of a context switching FPGA

S.M. Scalera, +1 more
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Dynamically Programmable Gate Arrays: A Step Toward Increased Computational Density

André DeHon
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Proceedings ArticleDOI

A time-multiplexed FPGA architecture for logic emulation

TL;DR: This paper presents an architecture for a FPGA oriented towards logic emulation, to achieve maximum usable logic density per unit silicon area, and fast mapping.
Proceedings ArticleDOI

Optically programmable gate array

TL;DR: The Optically Programmable Gate Array (OPGA), an optical version of a conventional FPGA, benefits from a direct parallel interface between an optical memory and a logic circuit allowing for rapid dynamic reconfiguration.
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