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Proceedings ArticleDOI

A time-multiplexed FPGA

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TLDR
The architecture of a time-multiplexed FPGA is described, which includes extensions for dealing with state saving and forwarding and for increased routing demand due to time- multiplexing the hardware.
Abstract
This paper describes the architecture of a time-multiplexed FPGA. Eight configurations of the FPGA are stored in on-chip memory. This inactive on-chip memory is distributed around the chip, and accessible so that the entire configuration of the FPGA can be changed in a single cycle of the memory. The entire configuration of the FPGA can be loaded from this on-chip memory in 30 ns. Inactive memory is accessible as block RAM for applications. The FPGA is based on the Xilinx XC4000E FPGA, and includes extensions for dealing with state saving and forwarding and for increased routing demand due to time-multiplexing the hardware.

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Citations
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Journal ArticleDOI

Reconfigurable computing: a survey of systems and software

TL;DR: The hardware aspects of reconfigurable computing machines, from single chip architectures to multi-chip systems, including internal structures and external coupling are explored, and the software that targets these machines is focused on.
Proceedings ArticleDOI

Fast Regular Expression Matching Using FPGAs

TL;DR: An efficient method for finding matches to a given regular expression in given text using FPGAs using the Nondetermineistic Finite Automaton, the first prctical use of a nondeterministic state machine on programmable logic.
Book

Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation

Scott Hauck, +1 more
TL;DR: This book is intended as an introduction to the entire range of issues important to reconfigurable computing, using FPGAs as the context, or "computing vehicles" to implement this powerful technology.
Proceedings ArticleDOI

Invited Paper: Enhanced Architectures, Design Methodologies and CAD Tools for Dynamic Reconfiguration of Xilinx FPGAs

TL;DR: In this article, the authors describe architectural enhancements to Xilinx FPGAs that provide better support for the creation of dynamically reconfigurable designs, augmented by a new design methodology that uses pre-routed IP cores for communication between static and dynamic modules and permits static designs to route through regions otherwise reserved for dynamic modules.
MonographDOI

FPGA-based Implementation of Signal Processing Systems

TL;DR: FPGA-based Implementation of Signal Processing Systems is an important reference for practising engineers and researchers working on the design and development of DSP systems for radio, telecommunication, information, audio-visual and security applications.
References
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Book

High ― Level Synthesis: Introduction to Chip and System Design

TL;DR: This paper presents a methodology for High-Level Synthesis of Architectural Models in Synthesis and its applications in Design Description Languages and Design Representation and Transformations.
Proceedings ArticleDOI

DPGA-coupled microprocessors: commodity ICs for the early 21st Century

TL;DR: It is noted how the tight integration of reconfigurable logic into the processor can overcome some of the major limitations of contemporary attached reconfiguring computer engines.
Patent

A programmable logic device which stores more than one configuration and means for switching configurations

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E. Tau
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