A software-based instrument for testing and monitoring multi-processing communications devices
TL;DR: A software-based instrument for testing and monitoring the behavior of complex communications systems that employ a number of interconnected DSPs based on a dynamic architecture that incorporates a set of distributed software probes for signal capturing and a central data acquisition unit for acquiring and post-processing of data.
Abstract: This paper presents a software-based instrument for testing and monitoring the behavior of complex communications systems that employ a number of interconnected DSPs. The instrument is based on a dynamic architecture that incorporates a set of distributed software probes for signal capturing and a central data acquisition unit for acquiring and post-processing of data. A high level application that is executed on a host computing machine enables command and control of the instrument's mode of operation and performs the necessary post-processing for the analysis and visualization of the measurements data. The application of this approach in the design and development of a DVB-S2 receiver using a software-radio platform is presented.
Summary (3 min read)
- Modern communications systems rely on new advances in various technical fields, such as adaptive modulation, iterative signal processing and error control coding  for providing new services.
- As a result, the hardware implementation of such systems involves complex and demanding techniques in terms of processing power and speed.
- The various measurements and parameters collected at the various system processing stages, have to be associated with a common time-base in order to support signal validation and overall functional verification †N. Papandreou is currently with IBM Zurich Research Laboratory procedures.
- The instrument is based on a versatile architecture that incorporates a set of interconnected software circuits acting also as system probes and is developed on a software-radio platform suitable for the design and implementation of complex communications systems.
- Additionally, a high-speed local bus or a highspeed network is used to transfer the collected data to a high-level software tool, for analysis and post-processing.
II. THE INSTRUMENT’S ARCHITECTURE
- It consists of various software probes attached to different processing stages of the device under development, the memory modules that provide the necessary storage of the collected data, the data acquisition and packet generation unit that coordinates the collection of the measurements from the various probes, the instrument’s basic controller and finally the interface to the high-level analysis environment.
- The software probes are implemented using dedicated threads that are embodied in the SCs of interest and are responsible for driving the measurement data to the memory modules using a flexible structure of software/hardware FIFOs.
- For each data stream the DAQ/PGU converts the retrieved data to a common format and generates a packet which is associated with a header and an appropriate time stamp.
- A PCI interface for interconnection with a host PC and a Gigabit Ethernet (GbE) interface for networking environments.
- In particular, the user application is responsible for demultiplexing the different data streams and proper correlation of the measurement data based on their timing information while it enables the user to send commands to the instrument where they are processed and acknowledged by the instrument’s controller.
III. THE INSTRUMENT IN A DVB-S2 RECEIVER IMPLEMENTATION
- The receiver consists of an FPGA circuit responsible for processing the analog IF input signal and for generating the respective baseband signals, and three DSP cores implementing the baseband signal processing from the I-Q signal components up to the processing of user IP packets and transmitting them over a gigabit ethernet (GbE) LAN.
- All the receiver circuits have been developed on a software radio platform, which also incorporates additional reprogrammable logic for logic demanding functions (line ECC), for the interconnection of the four hardware modules  and for acquiring the data at various stages of the receiver’s processing flow.
A. The DVB-S2 Receiver Architecture
- The input IF signal feeds the receiver’s high resolution analog to digital converter (ADC).
- The first unit is the digital down-converter (DDC)  that is implemented in a FPGA and converts the IF signal into the respective baseband one.
- This is done by searching the physical layer header based on the maximization of an appropriate output correlator .
- Based on the correct framing alignment, it is possible to demultiplex (through proper descrambling) the pilot symbols from the incoming frame in order to drive the following pilot-aided carrier and phase synchronization units.
- The first step incorporates a ‘coarse’ frequency recovery (CFR) mechanism which compensates large frequency offset errors up to several MHz and is implemented as a second order feedback loop based on a delay-and-multiply (DM) frequency error detector .
B. The Software Radio Platform
- The DVB-S2 receiver prototype along with the presented software-based instrument are implemented on a powerful hardware prototyping platform based on multiple DSP and FPGA devices.
- The hardware accelerator module shown in Fig. 2 digitizes and processes the incoming IF signal using a 12-bit ADC (up to 210 MSps) and a Virtex-II Pro (XC2VP30) FPGA with a PowerPC processor.
- An SDRAM of 128MB is also available for temporary storage purposes.
- The first and second SCs are executed on two powerful C6416T DSPs running at 1GHz and two Virtex-II Pro (XC2VP30) FPGA with an SDRAM of 256MB.
- The third SC runs on a C6713 DSP, a Virtex-II FPGA, while a NetSilicon ARM-chip with an integrated MAC controller is used for network protocol processing.
C. Mapping of the Instrument Procedures into SCs
- The first SC is dedicated to the multi-domain synchronization of the demodulation process which includes the symbol rate, frequency and phase recovery mechanisms along with frame synchronization and amplitude gain control.
- The threads responsible for the phase recovery and amplitude gain control are executed periodically on the complete frames derived by the previous set of threads.
- Finally, the last SC implements the interface of the receiver with the external environment that extracts the IP datagrams from successive frames in order to forward them to the GbE Ethernet network.
- Furthermore, the last SC circuit is also responsible for receiving and distributing the control commands of the high-level application that perform either receiver configuration or management of the performed measurements.
- All software circuits incorporate a dedicated thread that is used to coordinate their operation.
IV. DVB-S2 RECEIVER MEASUREMENTS AND VALIDATION EXAMPLE
- The authors demonstrate an example of using the highlighted instrument, which is integrated into the DVBS2 receiver software-radio implementation, that depicts the instrument’s contribution to complex communications systems.
- In the rest of this subsection, it is described the STR verification that was performed using the given instrumentation environment:.
- These parameters are the timing error detector output, the loop filter output and the control word of the interpolator which compensates the estimated symbol rate error.
- 4) Packets were transmitted to the control computing device through the GbE interface until an internal STR lock detector has identified that the STR has converged.
- 5) Finally, the high-level application creates the plots of the different parameters using a common time scale, while post-processing calculates several performance metrics such as: duration of initial acquisition, standard deviation of estimation error and mean normalized estimated error.
- This paper presented the architecture of a software-based instrument that can be used for testing, debugging and verification of complex communications systems that are realized in a multiple DSP environment.
- Due to the complexity of such systems a flexible methodology for efficient and rapid prototyping is needed.
- The highlighted instrument fulfills such a demand since it provides the means for effective validation and testing as it incorporates a versatile software measurement acquisition environment along with a control computing device that performs post-processing and visualization using a highlevel MATLAB application.
- An extensive application example of the software-based instrument into a software radio implementation of a DVB-S2 IF receiver has also been thoroughly analyzed.
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"A software-based instrument for tes..." refers background in this paper
...I. INTRODUCTION Modern communications systems rely on new advances in various technical fields, such as adaptive modulation, iterative signal processing and error control coding  for providing new services....
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