Patent
Adaptive read-ahead disk cache
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TLDR
In this paper, an adaptive read ahead cache is provided with a real cache and a virtual cache, where the real cache has a data buffer, an address buffer, and a status buffer.Abstract:
An adaptive read ahead cache is provided with a real cache and a virtual cache. The real cache has a data buffer, an address buffer, and a status buffer. The virtual cache contains only an address buffer and a status buffer. Upon receiving an address associated with the consumer's request, the cache stores the address in the virtual cache address buffer if the address is not found in the real cache address buffer and the virtual cache address buffer. Further, the cache fills the real cache data buffer with data responsive to the address from said memory if the address is found only in the virtual cache address buffer. The invention thus loads data into the cache only when sequential accesses are occurring and minimizes the overhead of unnecessarily filling the real cache when the host is accessing data in a random access mode.read more
Citations
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References
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Patent
Method and apparatus for efficiently handling temporarily cacheable data
John H. Anthony,William C. Brantley,Kevin P. McAuliffe,Vern Alan Norton,Gregory Francis Pfister +4 more
TL;DR: In this article, a method and apparatus for marking data that is temporarily cacheable to facilitate the efficient management of said data is presented, where a bit in the segment and/or page descriptor of the data called the marked data bit (MDB) is generated by the compiler and included in a request for data from memory by the processor in the form of a memory address and will be stored in the cache directory at a location related to the particular line of data involved.
Patent
Asynchronous read-ahead disk caching using multiple disk I/O processes adn dynamically variable prefetch length
TL;DR: In this paper, a file-based read-ahead method employs asynchronous I/O processes to fetch Demand and Read-ahead data blocks from a disk, depending on their physical and logical sequentialities.
Patent
System for scheduling readahead operations if new request is within a proximity of N last read requests wherein N is dependent on independent activities
TL;DR: In this paper, the disk controller keeps track of the last n reads to the array and if a new read request is received that is adjacent to any of those last reads, the controller performs a look ahead read because a sequential read may be in progress.
Patent
Enhanced cache operation with remapping of pages for optimizing data relocation from addresses causing cache misses
TL;DR: In this paper, the authors propose to add bus activity sampling logic to the CPU and enhance the operating system to detect when cache thrashing is occurring and remap data pages to new physical memory locations.
Patent
Cache hierarchy design for use in a memory management unit
Satish M. Thatte,Donald W. Oxley +1 more
TL;DR: In this article, a cache hierarchy to be managed by a memory management unit (MMU) combines the advantages of logical and virtual address caches by providing cache hierarchy having a logical address cache backed up by a virtual address cache.