Patent
Automatic routing system for circuit layout
TLDR
In this paper, the authors proposed a method for automatically planning the routing of circuit paths on a routing surface by defining a topology of the circuit paths according to input data for connections to be routed and respective routing constraints associated with the connections.Abstract:
A method is disclosed for automatically planning the routing of circuit paths on a routing surface by defining a topology of the circuit paths according to input data for connections to be routed and respective routing constraints associated with the connections to be routed; creating the circuit paths for connections to be routed having associated routing constraints iteratively according to the defined topology of the circuit paths within each unit zone; evaluating the circuit paths for compliance with the respective routing constraints during the step of creating the circuit paths; and saving data describing the circuit paths. In an alternate embodiment, a method is disclosed for planning the routing of circuit paths on at least one routing surface by creating a pattern of traces on a routing surface from input data for connections in accordance with the trace creating algorithm; after creating less than all of the pattern of traces, analyzing an operational characteristic of traces subject to predetermined routing constraints of the created portion of the pattern of traces in the operating environment of the trace; comparing results of the analyzing step to a specification for the operational characteristic of the created portion of the pattern of traces; modifying the trace creating algorithm if the operational characteristic fails to satisfy the specification; and repeating the foregoing steps until the operational characteristic satisfies the specification.read more
Citations
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Patent
Method and apparatus for selecting between multiple equal cost paths
TL;DR: In this article, each equal cost path is assigned a path ID created by concatenating an ordered set of link IDs which form the path through the network and the link IDs are sorted from lowest to highest to facilitate ranking of the paths.
Patent
Process and apparatus for finding paths through a routing space
Mac Stevens,Yves Parent +1 more
TL;DR: In this paper, an initial graph of nodes is created within a routing space, and the number and locations of the nodes in the graph are adjusted. Links are created between nodes of the graph, and traces between specified nodes are created through the linked graph.
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Layouts with routes with different spacings in different directions on the same layer, and method and apparatus for generating such layouts
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TL;DR: In this paper, the authors propose a method of routing nets in a multi-layer integrated-circuit (IC) layout, where the spacing between at least one particular route and an item adjacent to the route in the layout is different in different directions on the same layer.
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Process and apparatus for adjusting traces
TL;DR: In this paper, the authors propose to adjust traces routed through a computer depiction of a routing area of a system, such as an electronics system, by assigning forces to the nodes and moving the nodes in accordance with the nodes.
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Method, system, and program product to implement detail routing for double pattern lithography
Jeffrey S. Salowe,Satish Raj +1 more
TL;DR: In this article, a three-phase routing scheme is employed, comprising a global router, a C-router, and a detail router, which provides double patterning color seeding for routing tracks in electronic design.
References
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Patent
Method for deriving an interconnection route between elements in an interconnection medium
TL;DR: In this paper, a routing method for efficiently routing interconnections of a printed circuit board is developed, each interconnection consisting of a source and a target, where the interconnection medium is notionally divided into cells and, in a flooding routine for deriving the route between a particular source and target, cells at a progressively increasing distance from the source are considered.
Patent
Towards optimal Steiner tree routing in the presence of rectilinear obstacles
TL;DR: In this article, a Steiner tree can be found on an escape graph by constructing lines from given points (pins) and obstacles, parallel to the segment of the boundary on which the pin is located, until it reaches another obstacle or boundary of the core.
Patent
Layout design method and system for an improved place and route
Fumihiro Minami,Masako Murofushi +1 more
TL;DR: In this paper, a layout design method and system for a semiconductor integrated circuit improves circuit performances related to operated frequency and power consumption by improved placement and routing by predicting the number of intersecting wirings based on predicted wiring routes and calculating the capacitance calculating step that calculates the capacitances between the intersecting wires.
Patent
Method and system for user programmable design verification for printed circuit boards and multichip modules
TL;DR: In this article, a verification procedure is defined for a constraint, and the verification procedure can be registered in a constraint verification library such that it can be retrieved when an circuit element is supplied to a verification engine for verification of applicable design constraints on the circuit element.
Patent
Automatic routing method and automatic routing apparatus
TL;DR: In this article, an automatic routing method and automatic routing apparatus enable an optimum automatic routing under severe design conditions due to high-density mounting of an object of a wiring design such as an LSI, a multichip module, a printed wiring board, etc.
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