Patent
Binary incrementer circuit
TLDR
In this paper, an incrementer circuit, where a "1" is added to binary input information of n digits to provide binary output information, characterized in that output information of the lowest digit is produced as inverted input information by an inverter circuit, and that output of each of the second-lowest to nth digits is produced by passing either input information from a particular digit or its inverted signal from an inverted signal through a corresponding one of transfer gate transistor paths, which are controlled by the information of digits lower than the particular digit.Abstract:
An incrementer circuit, wherein a "1" is added to binary input information of n digits to provide binary output information, characterized in that output information of the lowest digit is produced as inverted input information by an inverter circuit, and that output information of each of the second-lowest to nth digits is produced by passing either input information of the particular digit or its inverted signal from an inverter circuit through a corresponding one of transfer gate transistor paths, which are controlled by the information of the digits lower than the particular digit.read more
Citations
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TL;DR: In this article, a series-coupled MOSFET incrementer circuit is described, which is adapted for use in conjunction with a clocked register for incrementing the binary value stored within the register.
References
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Patent
Binary synchronous up/down counter
TL;DR: In this paper, a binary counter consisting of a binary adder and flip-flops is presented, where the flips are connected to the A inputs of the adder, and the A outputs of the flipflops are connected with the B inputs of adder to any combination of source voltages.
Patent
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TL;DR: In this paper, a first shift register for storing one of the numbers with stages interconnected to diminish the values of the digits of the one number by predetermined amounts, respectively, as the digits thereof transfer between the stages.
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System for the modification of data stored in recirculating delay lines
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