Patent
Clock generation with non-integer clock dividing ratio
Gil Stoler,Yaniv Shapira +1 more
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TLDR
In this paper, a clock generator for generating a clock equivalent to a target clock which is an input clock divided by a non-integer ratio is presented. But the clock generator is not designed to generate a clock with a fixed number of cycles.Abstract:
A clock generator for generating a clock equivalent to a target clock which is an input clock divided by a non-integer ratio is disclosed The clock generator comprises a clock divider configured to receive the input clock and divide the input clock with a reconfigurable dividing ratio; and a control circuit controlling operations of the clock divider to divide the input clock by a first dividing ratio to generate a first number of cycles of a first clock in a frame, and divide the input clock by a second dividing ratio to generate a second number of cycles of a second clock in the frame, wherein a difference between a period of the frame and a cumulative time of the first number of cycles of the first clock and the second number of cycles of the second clock is less than a threshold valueread more
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References
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