Conclusions and Future Research Opportunities

TLDR: A methodology that applies to both hardware and software synthesis for ASIC and ASIP targets, as well as for programmable platforms, is presented, with increasing market pressures including shrinking time to market and rising cost of layout masks.

Abstract: We have presented our work on function / architecture optimization and co-design of embedded systems; a methodology that applies to both hardware and software synthesis for ASIC and ASIP targets, as well as for programmable platforms. With increasing market pressures including shrinking time to market and rising cost of layout masks, the importance of the latter architectural target cannot be over-emphasized. Figure 10.1 displays the envisioned required paradigm for programmable platforms1 and how function / architecture co-design comes into the picture. The Figure is intended to show that we typically have an incompletely specified, possibly “vague” (non-deterministic if you wish) functional specification captured by the trapezoid. Similarly for the architecture we use an inverted trapezoid to emphasize that several possible alternative architectures (parameterizations of a platform if you wish) may be suitable for realizing our intent. The specification casts a shadow on the architectural space in the refinement levels on how it can be realized. In turn the application architectural specification space sheds a light on what can be realized with the architecture as required by the application. The architecture can be more powerful than what the typically restricted functional specification can describe; in fact this is most often the case in architectures with large memories and ways to access these memories (essentially Turing Complete), where the architecture is definitely more powerful than what we would like to describe (or even can in a restricted language) at the functional level.