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Patent

Controller for generating a periodic signal with an adjustable duty cycle

TLDR
In this paper, a controller that is linearly responsive to an input voltage provides continuously adjustable control of the width of a periodically repeating digital pulse, thereby achieving a linear voltage to duty-cycle ratio transfer function.
Abstract
A controller that is linearly responsive to an input voltage provides continuously adjustable control of the width of a periodically repeating digital pulse, thereby achieving a linear voltage to duty-cycle ratio transfer function. The circuit of the present invention includes a master clock input, a ratio control voltage input, a controlled duty cycle clock output, a high gain amplifier configured as an integrator having differential inputs, each equipped with a low pass filter, a controlled current source, a resettable timing capacitor, a threshold detector and a reference pulse generator.

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Citations
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Patent

Method and system for controlling the duty cycle of a clock signal

TL;DR: In this paper, a system for controlling the duty cycle of a clock signal is presented. But the system is not suitable for the use of a single-input single-output (SISO) circuit.
Patent

Programmable phase shift and duty cycle correction circuit and method

TL;DR: In this article, a phase shift and duty cycle correction circuit is described, which consists of a programmable digital to analog converter (DAC), a storage device (e.g., a capacitor), a charge sub-circuit and a dump subcircuit for charging and discharging the storage device, respectively, a comparator and a clock driver circuit.
Patent

Test circuit, system, and method for testing one or more circuit components arranged upon a common printed circuit board

TL;DR: In this paper, a test circuit, system, and method for testing one or more circuit components arranged upon a monolithic substrate is described, where the test circuit is used to determine the jitter and/or duty cycle distortion (DCD) tolerance of any system component without changing the frequency of the clock signal supplied to the component or injecting noise into the clock recovery system.
Patent

Wireless communication IC and wireless communication information storage medium using the same

TL;DR: In this article, a wireless communication IC includes a capacitor for storing electric power, a diode placed between one end of the antenna and the capacitor for supplying a charge current of the radio signal to the capacitor, and a load modulation circuit.
Patent

Driving a single-phase motor

TL;DR: In this article, a single-phase motor driving circuit includes a controller for outputting a control signal to drive a single phase motor in a period in which a saw-tooth voltage of a predetermined cycle is larger than a duty setting voltage based on a result of comparing a detected temperature voltage changed based on the temperature detected by a temperature detecting device.
References
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Patent

Ultra-wideband receiver

TL;DR: In this paper, an ultrawide (UWB) receiver utilizes a strobed input line (14) with a sampler (10) connected to an amplifier (18).
Patent

Electronic multi-purpose material level sensor

TL;DR: A sensor for determining the surface or interface level of a material comprising a transceiver (12) and an inner conductor (21) of a coaxial cable (16) electrically coupling the transceiver to a guide wire (14) partially immersed in the material is described in this article.
Patent

Micropower RF transponder with superregenerative receiver and RF receiver with sampling mixer

TL;DR: In this paper, the quench oscillator is external to the regenerative transistor and applies an exponentially decaying waveform rather than the usual sinewave to achieve high sensitivity at microampere current levels.
Patent

Ultra-wideband directional sampler

TL;DR: The WB Directional Sampler (UWBDS) as discussed by the authors is a four-port device that combines the function of a directional coupler with a high speed sampler for time domain reflectometry.
Patent

Precision digital pulse phase generator

TL;DR: In this paper, an operational amplifier drives a control voltage to the resistor-capacitor combination according to currents integrated from the phase monitor and injected into summing junctions to provide a phase delay of the variable-delay output pulse to the output reference pulse that linearly depends on the input digital control code.