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Patent

Efficient interpolator for high speed timing recovery

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TLDR
In this paper, a data processing circuit includes a digital data source having an output carrying a sequence of digital signals and an interpolation circuit with a first input coupled to the first output of the pre-filter and a second input coupled with the second output of a prefilter.
Abstract
A data processing circuit includes a digital data source having an output carrying a sequence of digital signals. A pre-filter is coupled to the output of the digital data source. The pre-filter has a first output that carries a second sequence of digital signals and a second output that carries a third sequence of digital signals. The second sequence of digital signals is time shifted relative to the third sequence of digital signals. The circuit also includes an interpolation circuit with a first input coupled to the first output of the pre-filter and a second input coupled to the second output of the pre-filter.

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References
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Journal ArticleDOI

Interpolation in digital modems. I. Fundamentals

TL;DR: The author describes the fundamental equation for interpolation, proposes a method for control, and outlines the signal-processing characteristics appropriate to an interpolator.
Journal ArticleDOI

Interpolation in digital modems. II. Implementation and performance

TL;DR: The NCO-based control method presented in Part I is shown to be equivalent to a conventional phase locked loop and its operation is verified by simulation, demonstrating that simple interpolators give excellent performance.
Patent

Sampled amplitude read channel employing interpolated timing recovery

TL;DR: In this paper, the authors propose an interpolating timing recovery circuit, responsive to the equalized channel samples, computes an interpolation interval τ and, in response thereto, generates interpolated sample values substantially synchronized to the baud rate.
Patent

Sampled amplitude read channel employing a user data frequency synthesizer and a servo data frequency synthesizer

TL;DR: In this paper, the authors propose a magnetic disk storage system for reading data recorded in concentric tracks on a magnetic medium, where the data comprises user data sectors recorded at varying data rates across a plurality of predefined zones and embedded servo data sector recorded at the same data rate across the zones.
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Sampled amplitude read channel employing a residue number system FIR filter in an adaptive equalizer and in interpolated timing recovery

TL;DR: In this paper, a sampled amplitude read channel is disclosed for disk storage systems which asynchronously samples an analog read signal, adaptively equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values through interpolated timing recovery, and detects digital data from the synchronized sample values using a Viterbi sequence detector.