Journal ArticleDOI
Energy-recovery flip-flop design using improved adiabatic pseudo-domino logic structure
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TLDR
In this paper, the improved adiabatic pseudo-domino logic (IAPDL)-based flip-flop and JK flipflop designs based on the improved IAPDL-4φ are presented.About:
This article is published in Microelectronics Journal.The article was published on 1999-09-01. It has received 4 citations till now. The article focuses on the topics: Adiabatic circuit & Logic family.read more
Citations
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Journal ArticleDOI
ECRL-based low power flip-flop design
TL;DR: Adiabatic switching or energy recovery technique is used in the design of low-power flip-flop designs based on the ECRL architecture, which have shown significant improvement in terms of power consumption over their CMOS counterparts.
Journal ArticleDOI
Energy‐recovery low power C‐PAL flip‐flop design
H.H. Wong,K.T. Lau +1 more
TL;DR: In this paper, energy-recovery/adiabatic flip-flops based on improved PAL-2N logic with complementary pass transistor logic (CPL) evaluation tree (C‐PAL) family are described.
Journal ArticleDOI
Performance Improvement of GFCAL Circuits
TL;DR: A new approach to improve the performance of the glitch free cascadable adiabatic logic (GFCAL) circuit is presented by replacing the triangular power supply with sinusoidal and trapezoidal power supplies and by sizing of transistors.
Patent
High speed domino-based flip flop
Berzins Matthew,James Jung Lim +1 more
TL;DR: In this paper, a flip-flop with a single footer transistor and a pre-charge transistor connected to the footer node for precharging before an evaluation cycle is presented, and combinatory logic configured to evaluate a complimentary signal in conjunction with circuit events.
References
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Journal ArticleDOI
Improved adiabatic pseudo-domino logic family
TL;DR: In this paper, an improved input-isolation structure for APDL (adiabatic pseudo-domino logic) is proposed, which provides a higher frequency performance in excess of 1 GHz with simple clock supplies.
Journal ArticleDOI
Analysis of improved adiabatic pseudo-domino logic family
D. Patel,E.J. Morton +1 more
TL;DR: In this article, the authors show that when an improved adiabatic pseudo-domino logic circuit is used to perform complex logic, the circuit is susceptible to switching noise and logic failure.
Journal ArticleDOI
Four-phase improved adiabatic pseudo-domino logic
TL;DR: In this article, a four-phase improved adiabatic pseudo-domino logic (IAPDL-4/spl phi/) was proposed, which has the same circuit structure as IAPDL, but a different clocking system.