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Patent

Flip-flop circuit

Akira Aso
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TLDR
In this article, two-input NAND gates 12 and 13 and the selector circuits 14 and 15 are added on a D type FF circuit 11 to simplify a test by switching an FF circuit to a combinational circuit by switching input via a selector circuit.
Abstract
PURPOSE:To simplify a test by switching an FF circuit to a combinational circuit by switching input via a selector circuit. CONSTITUTION:Two-input NAND gates 12 and 13 and the selector circuits 14 and 15 are added on a D type FF circuit 11. Set input and data input are connected to the circuit 14 via the gate 12, and clock input and reset input to the circuit 15 via the gate 13, and the output Q, Q of the FF11 and that of the gates 12 and 13 are selected by switching mode switching input M1, and are outputted from the circuits 14 and 15. Thereby, since all of the sequential circuit groups 17 and 19 can be converted to the combinational circuit groups 16, 18, and 20 logically by the mode switching input M1 even in a circuit of logical construction in which the combinational circuit groups 16, 18, and 20 and the sequential circuit groups 17 and 19 are connected alternately, it is possible to generate a test pattern easily.

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