Journal ArticleDOI
Hiding rollback latency in log-based eager hardware transactional memory
Sungjae Lee,Inhwan Lee +1 more
TLDR
The use of a rollback buffer (RB) for hiding the rollback latency in log-based eager hardware transactional memory is proposed, and when running the Stanford transactional applications for multi-processing benchmark on a 16-core processor that implements the LogTM-SE, the speedup is almost disappears.Abstract:
The use of a rollback buffer (RB) for hiding the rollback latency in log-based eager hardware transactional memory is proposed. The RB allows a transaction to abort without performing rollback, but still makes the transaction's old values immediately available. In effect, the rollback latency almost disappears. When running the Stanford transactional applications for multi-processing benchmark on a 16-core processor that implements the LogTM-SE, the speedup (decrease in execution time) achieved with a 2 KB RB is 15.8% on average.read more
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Proceedings ArticleDOI
STAMP: Stanford Transactional Applications for Multi-Processing
TL;DR: This paper introduces the Stanford Transactional Application for Multi-Processing (STAMP), a comprehensive benchmark suite for evaluating TM systems and uses the suite to evaluate six different TM systems, identify their shortcomings, and motivate further research on their performance characteristics.
Proceedings ArticleDOI
LogTM: log-based transactional memory
TL;DR: This paper presents a new implementation of transactional memory, log-based transactionalMemory (LogTM), that makes commits fast by storing old values to a per-thread log in cacheable virtual memory and storing new values in place.
Proceedings ArticleDOI
LogTM-SE: Decoupling Hardware Transactional Memory from Caches
Luke Yen,Jayaram Bobba,Michael R. Marty,Kevin E. Moore,Haris Volos,Mark D. Hill,Michael M. Swift,Darien Wood +7 more
TL;DR: This paper proposes a hardware transactional memory system called LogTM Signature Edition (LogTM-SE), which uses signatures to summarize a transactions read-and write-sets and detects conflicts on coherence requests (eager conflict detection), and allows cache victimization, unbounded nesting, thread context switching and migration, and paging.
Proceedings ArticleDOI
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery
TL;DR: FASTM is presented, an eager log-based HTM that takes advantage of the processor’s cache hierarchy to provide fast abort recovery and uses a novel coherence protocol to buffer the transactional modifications in the first level cache and to keep the non-speculative values in the higher levels of the memory hierarchy.
Proceedings ArticleDOI
Version management alternatives for hardware transactional memory
TL;DR: It is shown that aborts are frequent especially for applications with coarse-grain transactions and many threads, and that this severely restricts the scalability of log-based HTMs, and proposed the use of a gated store buffer to accelerate eager version management for log- based HTM.