Patent
Integrated circuit structure having a unique surface metallization layout
Theodore H. Baker,Daniel Tuman +1 more
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TLDR
A planar monolithic integrated circuit chip containing an isolation region of one conductivity type extending completely around the edge or periphery of the chip in order to insure that there are no exposed P-N junctions on an edge surface of chip.Abstract:
A planar monolithic integrated circuit chip containing an isolation region of one conductivity type extending completely around the edge or periphery of the chip in order to insure that there are no exposed P-N junctions on an edge surface of the chip. Such an isolation region extends for at least a minimum distance from the edge of the chip, said distance being determined so as to minimize the risk of any edge defects in the chip resulting from dicing and handling from extending beyond the isolation region into the body of the chip. An insulative layer over the planar surface of the chip supports a metallization pattern for interconnecting the devices in the integrated circuit and for distributing a plurality of voltage supplys at different levels to the devices. The metallization pattern is arranged so that only metallization connected to the voltage supply at the same level as the peripheral isolation region is located on the portion of the insulative layer between the chip edge and the minimum distance of the isolation junction from the edge.read more
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Patent
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TL;DR: In this article, a large scale semiconductor integrated circuit device comprising plural transistors and resistors formed in one semiconductor substrate, and many emitter-coupled circuits formed by connecting the transistors with a double metallic layer on the substrate surface, is disposed in the form of arrays with circuits of several groups handling larger power than those of other groups.
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References
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Patent
Monolithic integrated structure including fabrication thereof
TL;DR: In this article, the authors discuss the feasibility of constructing a multiple-circling structure from a single-master-slave configuration, where a number of components can be used to construct any selected logic ciruit from a class of many different CirCUIs.
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Voltage distribution system for integrated circuits utilizing low resistivity semiconductive paths for the transmission of voltages
TL;DR: A voltage distribution system formed in a monolithic integrated circuit structure and a process for making same is described in this article, where P-type and N-type conductivity semiconductor layers form respective portions of separate conductive paths for distributing electrical potentials to semiconductor devices or other components within the same integrated structure.
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