Proceedings ArticleDOI
Lightweight, robust adaptivity for software transactional memory
Michael Spear
- pp 273-283
Reads0
Chats0
TLDR
This work presents a low-overhead system for adapting between STM implementations, which enables adaptivity between different parameterizations of a given algorithm, and it allows adapting between the use of transactions and coarse-grained locks.Abstract:
When a program uses Software TransactionalMemory (STM) to synchronize accesses to shared memory, the performance often depends on which STM implementation is used. Implementation vary greatly in their underlying mechanisms, in the features they provide, and in the assumptions they make about the common case. Consequently, the best choice of algorithm is workload-dependent. Worse yet, for workload composed of multiple phases of execution, the "best choice of implementation may change during execution.We present a low-overhead system for adapting between STM implementations. Like previous work, our system enable adaptivity between different parameterizations of a given algorithm, and it allows adapting between the use of transactions and coarse-grained locks. In addition, we support dynamic switching between fundamentally different STM implementations. We also explicitly support irrevocability retry-based condition synchronization, and privatization. Through a series of experiments, we show that our system introduces negligible overhead. We also present a candidate use of dynamic adaptivity, as a replacement for contention management. When using adaptivity in this manner, STM implementations can be simplified to a great degree without lowering throughput or introducing a risk of pathological slowdown, even for challenging workloads.read more
Citations
More filters
Journal Article
A Lazy Snapshot Algorithm with Eager Validation
TL;DR: This paper formally introduces a lazy snapshot algorithm that verifies at each object access that the view observed by a transaction is consistent and demonstrates that the performance is quite competitive by comparing other STMs with an STM that uses the algorithm.
Proceedings ArticleDOI
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Luke Dalessandro,Francois Carouge,Sean White,Yossi Lev,Mark S. Moir,Michael L. Scott,Michael Spear +6 more
TL;DR: A family of hybrid TMs built using the recent NOrec STM algorithm is introduced that, unlike existing hybrid approaches, provide both low overhead on hardware transactions and concurrent execution of hardware and software transactions.
Journal ArticleDOI
Language-independent sandboxing of just-in-time compilation and self-modifying code
Jason Ansel,Petr Marchenko,Úlfar Erlingsson,Elijah Taylor,Brad Chen,Derek L. Schuff,David C. Sehr,Clifford L. Biffle,Bennet S. Yee +8 more
TL;DR: This paper introduces general mechanisms for safely and efficiently sandboxing software, such as dynamic language runtimes, that make use of advanced, low-level techniques like runtime code modification.
Journal ArticleDOI
A transactional memory with automatic performance tuning
TL;DR: Methods for constructing policies to dynamically select the most appropriate TM algorithm based on static and dynamic information are introduced and a low-overhead framework for dynamic profiling of a running transactional application is introduced.
Proceedings ArticleDOI
Hardware acceleration of transactional memory on commodity systems
Jared Casper,Tayo Oguntebi,Sungpack Hong,Nathan G. Bronson,Christos Kozyrakis,Kunle Olukotun +5 more
TL;DR: It is demonstrated that hardware can substantially accelerate the performance of an STM on unmodified commodity processors, and it is shown that, for all but short transactions, it is not necessary to modify the processor to obtain substantial improvement in TM performance.
References
More filters
Journal ArticleDOI
Space/time trade-offs in hash coding with allowable errors
TL;DR: Analysis of the paradigm problem demonstrates that allowing a small number of test messages to be falsely identified as members of the given set will permit a much smaller hash area to be used without increasing reject time.
Journal ArticleDOI
Algorithms for scalable synchronization on shared-memory multiprocessors
TL;DR: The principal conclusion is that contention due to synchronization need not be a problemin large-scale shared-memory multiprocessors, and the existence of scalable algorithms greatly weakens the case for costly special-purpose hardware support for synchronization, and provides protection against so-called “dance hall” architectures.
Book
Algorithms for scalable synchronization on shared-memory multiprocessors
TL;DR: In this article, the authors present a scalable algorithm for spin locks that provides reasonable latency in the absence of contention, requires only a constant amount of space per lock, and requires no hardware support other than a swap-with-memory instruction.
Proceedings ArticleDOI
STAMP: Stanford Transactional Applications for Multi-Processing
TL;DR: This paper introduces the Stanford Transactional Application for Multi-Processing (STAMP), a comprehensive benchmark suite for evaluating TM systems and uses the suite to evaluate six different TM systems, identify their shortcomings, and motivate further research on their performance characteristics.
Journal Article
Transactional locking II
Dave Dice,Ori Shalev,Nir Shavit +2 more
TL;DR: This paper introduces the transactional locking II (TL2) algorithm, a software transactional memory (STM) algorithm based on a combination of commit-time locking and a novel global version-clock based validation technique, which is ten-fold faster than a single lock.