Patent
Manufacturing computer systems with fine line circuitized substrates
Anilkumar C. Bhatt,Roy H. Magnuson,Thomas R. Miller,Voya R. Markovich,Carlos J. Sambucetti,Stephen L. Tisdale +5 more
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TLDR
In this paper, the process includes seeding the surface, coating the surface with a first solution containing surfactant and electroplating in a second solution in which the level of surfactants is regulated by determining the surface tension and meta-surfactant addition to the second solution depending on the determination of surface tension.Abstract:
Circuit boards are manufactured by forming a substrate with a dielectric surface and laminating a metal foil onto the substrate. The metal foil is patterned to form a first wiring layer. A permanent photoimagable dielectric layer is formed over the wiring layer and via holes are formed through the dielectric layer over pads and conductors of the wiring layer. Holes are formed through the substrate and substrate surfaces including the photoimagable dielectric, walls of the via holes, and walls of the through holes subjected to an electroless copper plating process. The process includes seeding the surface, coating the surface with a first solution containing surfactant and electroplating in a second solution in which the level of surfactant is regulated by determining the surface tension and metering surfactant addition to the second solution depending on the determination of surface tension. The copper plating on the photoimagable dielectric is patterned to form an exterior wiring layer which is covered by solder resist with windows over lands around the through holes and surface mount connection pads of the exterior wiring layer to form a high density circuitized substrate. Surface mount components and/or pin in hole components are attached to the circuitized substrate with solder joints between terminals of the components and the lands and/or connection pads to form a high density circuit board assembly. One or more of the circuit board assemblies are mounted in an enclosure with a power supply, CPU, RAM, and I/O means to form an information handling system with increased performance due to shorter signal flight times due to the higher device density.read more
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Patent
Membrane probing system
TL;DR: A membrane probing assembly includes a probe card with conductors supported thereon, wherein the conductors include at least a signal conductor located between a pair of spaced apart guard conductors as discussed by the authors.
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Patent
Printed wiring board and method of manufacturing the same
Masaru Takada,Hiroyuki Kobayashi,Kenji Chihara,Hitsashi Minoura,Kiyotaka Tsukada,Mitsuhiro Kondo +5 more
TL;DR: In this paper, a metal plating film is formed by using an electric plating lead, which is then cut off by a laser beam after the plating has been finished.
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Method for constructing a membrane probe using a depression
TL;DR: In this paper, a tool is brought into contact with the substrate and a dielectric (insulative) layer is supported by the substrate, and a polyimide layer is then patterned over the entire surface.
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Patent
Composition for photo imaging
TL;DR: In this paper, an improved photoimagable cationically polymerizable epoxy based coating material is provided, which includes an epoxy resin system consisting essentially of between about 10% and about 80% by weight of a polyol resin which is a condensation product of epichlorohydrin and bisphenol A having a molecular weight between about 40,000 and 130,000.
Patent
Method for the manufacture of multilayer printed circuit boards
TL;DR: In this paper, a process for manufacturing printed circuit boards in which a radiation curable material (10) is applied to a substrate (14), the material is exposed to radiation and developed to expose those regions where a first conductor circuit pattern is to be formed.
Patent
Method of preparing a printed circuit board
Anilkumar C. Bhatt,Roy H. Magnuson,Voya R. Markovich,Konstantinos I. Papathomas,Douglas O. Powell +4 more
TL;DR: In this article, the printed circuit board has two types of plated through holes, one for receiving a pin-in-through-hole module or component pin and the other for surface mount technology.
Patent
Method of making a multilayer thin film structure
Kenneth Chang,George Czornyj,Mukta S. Farooq,Ananda H. Kumar,Marvin S. Pitler,Heinz O. Steimel +5 more
TL;DR: In this article, a multilayer thin film structure is constructed on the surface of a dielectric substrate, which includes the steps of applying a first layer of polymeric material over the first layer, exposing and developing the second polymeric materials to form a feature therein, the second layer feature in communication with at least one feature formed in the first polymeric surface, and filling the features in the entire multillayer structure simultaneously with conductive material.
Patent
Method for selective electroless plating copper onto a non-conductive substrate surface
William Joseph Amelio,Gary Kevin Lemon,Voya R. Markovich,Theodore Panasik,Carlos J. Sambucetti,Donna Jean Trevitt +5 more
TL;DR: In this article, a multistep process for electroless plating copper onto a nonconductive surface including the steps of 1) laminating a rough copper sheet onto the non conductive surface, 2) etching away all the copper, 31 conditioning the surface with multifunctional positively charged molecules derived from copolymers of polyacrylamide and functionally active tetraalkylammonium compounds in an diluted inorganic acid, 4) activating the conditioned surface preferably with stannous palladium chloride particles, 5) treating the activated surface with deionized water and