Patent
Method of making high voltage transistor
TLDR
In this article, a gate region is formed on a surface of the substrate and a drain region of the first conductivity type is formed in contact with a second end of the extended drain region.Abstract:
In a method for constructing a semiconducting device, within a substrate of a first conductivity type there is formed a well of second conductivity type. Within the well, an extended drain region of a first conductivity type is formed. An insulating region over the extended drain region is formed. A gate region is formed on a surface of the substrate. A first side of the gate region is adjacent to a first end of the extended drain region. A drain region of the first conductivity type is formed. The drain region is in contact with a second end of the extended drain region. A source region is formed on a second side of the gate region.read more
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Patent
High-voltage vertical transistor with a multi-gradient drain doping profile
Sujit Banerjee,Donald Ray Disney +1 more
TL;DR: In this article, a highvoltage transistor includes first and second trenches that define a mesa in a semiconductor substrate, with each of the field plate members being separated from the mesa by a dielectric layer.
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TL;DR: In this article, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the die, and a second section of transistors in a second area adjacent the first area.
References
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Patent
High voltage MOS transistors
TL;DR: In this article, an extended drain region is formed on top of a substrate of opposite conductivity-type material by ion-implantation through the same mask window as the extended drain.
Patent
High power MOSFET and integrated control circuit therefor for high-side switch application
TL;DR: In this paper, a lateral conduction high power MOSFET chip with integrated control circuits is disclosed for high-side switching applications, where a surface field reduction region disposed between drain and source regions extends from the chip surface and into its body and has a charge density of about 1×1012 ions/cm2.
Patent
LDD transistor process having doping sensitive endpoint etching
TL;DR: An LDD transistor is formed by using a process which insures that a layer of gate oxide is not inadvertently etched into and is not ruptured by static electrical charges as discussed by the authors, where a chemical etch is utilized to detect specific endpoints in the etching of the gate electrode material.
Patent
Lightly doped drain MOSFET with reduced on-resistance
TL;DR: In this paper, a construction method and apparatus for lightly doped drain MOSFET that has low or minimum drift on-state resistance and maintains high voltage blocking in the off-state is presented.
Patent
Bidirectional output semiconductor field effect transistor and method for its maufacture
TL;DR: In this paper, a high voltage bidirectional output semiconductor field effect transistor (BOSFET) is disclosed which is turned on from the electrical output of a photovoltaic stack which is energized from an LED.