Patent
High voltage MOS transistor with a low on-resistance
TLDR
In this paper, an improved insulated-gate, field effect transistor and a three-sided junction-gate field-effect transistor are connected in series on the same chip to form a high-voltage MOS transistor.Abstract:
An embodiment of the present invention is an improved insulated-gate, field-effect transistor and a three-sided, junction-gate field-effect transistor connected in series on the same chip to form a high-voltage MOS transistor. An extended drain region is formed on top of a substrate of opposite conductivity material. A layer of material with a conductivity opposite to that of the material of the extended drain region is buried within the extended drain region such that field-effect pinch-off depletion zones extend both above and below the buried layer. A top layer of material similar to the substrate is formed by ion implantation through the same mask window as the extended drain region. The top layer covers the buried layer and extended drain region and itself is covered by a silicon dioxide layer above. Current flow through the extended drain is controlled by the substrate and buried layer when a voltage is applied to pinch-off the extended drain between them in a familiar field-effect fashion.read more
Citations
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Patent
Field effect-controlled semiconductor component
TL;DR: The claimed field effect-controlled semiconductor component has a drain zone of the first conduction type, at least one gate electrode made of polycrystalline silicon and insulated from the drain zone, and a source region of the second conduction types built into the drain region as mentioned in this paper.
Patent
High-voltage transistor with multi-layer conduction region
TL;DR: A high voltage insulated gate field effect transistor (HVFET) as mentioned in this paper is a high voltage HVET with parallel JFET conduction channels in the extended portion of the well region.
Patent
High-voltage lateral transistor with a multi-layered extended drain structure
TL;DR: In this article, a high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions separated from field plate members by one or multiple dielectric layers.
Patent
Three-terminal gate-controlled semiconductor switching device with rectifying-gate
TL;DR: In this paper, a three-terminal interconnected silicon MOSFET and silicon carbide MESFET (or JFET) was designed to block positive drain biases when the gate electrode is shorted to the source electrode.
Patent
Method of making a high-voltage transistor with multiple lateral conduction layers
TL;DR: In this article, a method for making a high voltage insulated gate field effect transistor (HVFET) with a source and a drain comprises the steps of forming the drain (19) with an extended well region (17) having one or more buried layers of opposite conduction type sandwiched therein.
References
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Patent
High voltage MOS transistors
TL;DR: In this article, an extended drain region is formed on top of a substrate of opposite conductivity-type material by ion-implantation through the same mask window as the extended drain.
Patent
Lateral double-diffused MOS transistor devices suitable for source-follower applications
TL;DR: A lateral double-diffused MOS transistor includes an intermediate semiconductor layer of the same conductivity type as the channel region which extends laterally from the channel regions to beneath the drain contact region of the device as mentioned in this paper.
Patent
Conductivity-modulation metal oxide semiconductor field effect transistor
TL;DR: In this article, a turn-off controlling transistor is temporarily formed wherein the N type base (30) is short-circuited to the drain electrode (48), whereby case, the flow of carriers accumulated in the n type base is facilitated to accelerate dispersion of carriers upon turnoff of the transistor.
Patent
Signal processor for video printer
TL;DR: In this article, the authors proposed a method to obtain a visually favorable print according to an inputted signal by converting a video signal according to set tone reproduction characteristics, outputting the converted signal, and switching the set tones reproduction characteristics according to a detected signal level.