Patent
Method of manufacturing semiconductor device
Katsuhiko Ito,Takashi Tsuchimoto +1 more
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TLDR
In this article, a shallow P-N junction is constructed under precise control of the position of its position in the depletion layer of a semiconductor substrate, where an impurity doped layer of the first conductivity type is formed, so that the impurity concentration may become a maximum at substantially the surface of a substrate or at an inner part of the substrate.Abstract:
A method of forming a shallow P-N junction under precise control of its position. An impurity doped layer of the first conductivity type is formed, so that the impurity concentration may become a maximum at substantially the surface of a semiconductor substrate or at an inner part of the semiconductor substrate. Ions of impurities of a second conductivity type, opposite to the first conductivity type, are implanted, so that the impurity concentration may become a maximum greatest at the maximum depletion layer thickness in the semiconductor substrate. The P-N junction finally formed is located within the maximum depletion layer thickness.read more
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References
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Patent
Method of manufacturing an n-channel mos field-effect transistor
TL;DR: In this paper, the process for fabricating an N-channel enhancement type field effect semiconductor device includes the step of implanting impurity atoms to form a channel region in a high resistivity substrate between the source and drain regions.
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TL;DR: In this article, the authors present an example of the use of PROTON ENHANCED DIFFUSION in the construction of a carriere for a PEDESTAL TRANSISTOR.
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