J. Beerten, S. Cole, and R. Belmans, “Modeling of multi-terminal VSC HVDC systems with
distributed DC voltage control,” IEEE Transactions on Power Systems, vol. 29, no. 1, pp. 34-42,
Jan. 2014.
Digital Object Identifier: 10.1109/TPWRS.2013.2279268
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IEEE TRANSACTIONS ON POWER SYSTEMS, VOL. X, NO. X, MONTH 201X 1
Modelling of Multi-terminal VSC HVDC Systems
with Distributed DC Voltage Control
Jef Beerten, Member, IEEE, Stijn Cole, Member, IEEE, and Ronnie Belmans, Fellow, IEEE
Abstract—This paper discusses the extension of electromechan-
ical stability models of Voltage Source Converter High Voltage
Direct Current (VSC HVDC) to Multi-terminal (MTDC) systems.
The paper introduces a control model with a cascaded DC voltage
control at every converter that allows a two-terminal VSC HVDC
system to cope with converter outages. When extended to a
MTDC system, the model naturally evolves into a master-slave
set-up with converters taking over the DC voltage control in case
the DC voltage controlling converter fails. It is shown that the
model can be used to include a voltage droop control to share the
power imbalance after a contingency in the DC system amongst
the converters in the system. Finally, the paper discusses two
possible model reductions, in line with the assumptions made in
transient stability modelling. The control algorithms and VSC
HVDC systems have been implemented using both MatDyn, an
open source MATLAB transient stability program, as well as the
commercial power system simulation package EUROSTAG.
Index Terms—HVDC transmission control, Power system mod-
eling, Power system stability.
I. INTRODUCTION
O
VER the last decade, the power engineering world is
showing an increasing interest in Voltage Source Con-
verter High Voltage Direct Current (VSC HVDC) technology.
In Europe, suggestions have even been made to construct
a new overlay DC grid based on VSC HVDC technology
[1]. With these prospects of extending the principles of VSC
HVDC to Multi-terminal (MTDC) configurations, the mod-
elling and control of MTDC systems has become one of
the more prominent research topics. This paper introduces a
generic electromechanical stability model for MTDC systems
with a distributed DC voltage control. The focus of the paper is
on the DC system itself and not on the interconnected AC/DC
system.
When modelling the MTDC system, a distinction is tradi-
tionally made based on the level of modelling detail. Electro-
Magnetic Transient Programs (EMTP) accurately represent the
switching dynamics and electromagnetic transients. Averaged
models and electromechanical stability models [2] have been
used to study alternative outer controller structures [3]–[5],
and optimized control settings [6]–[8] as well as dynamic
Jef Beerten is funded by a research grant from the Research Foundation –
Flanders (FWO).
Jef Beerten and Ronnie Belmans are with the Department of Electrical
Engineering (ESAT), Division ELECTA, University of Leuven (KU Leuven),
Kasteelpark Arenberg 10, bus 2445, 3001 Leuven-Heverlee, Belgium. (e-mail:
jef.beerten@esat.kuleuven.be, ronnie.belmans@esat.kuleuven.be)
Stijn Cole is with the Power System Consulting group of
Tractebel Engineering, Arianelaan 7, 1200 Brussels, Belgium (e-mail:
stijn.cole@gdfsuez.com).
interaction with the AC system [9], [10] and system frequency
support [11], [12]. Power flow algorithms, as presented in
[13], have been used to address the steady-state effects of a
distributed DC voltage control [14], [15].
Significant work has already been carried out on the mod-
elling and control of MTDC systems. With the DC system
voltage being the most crucial control variable, most focus
has been dedicated towards a distributed control of the DC
voltage at different converters. The two main control methods
are Voltage Margin Control [5], [16] and DC voltage droop
control [6]–[8], [10], [17].
This paper builds upon the fundamental frequency modeling
approach presented in [2]. Two important extensions are added
to the model. Firstly, current and voltage limits are represented
in detail in the current control loop and in the outer controller.
Secondly, a cascaded control structure is introduced in the
outer controller which allows power controlling converters to
take over the voltage control when the DC voltage controlling
converter fails. The main innovation is that this cascaded
control structure for a two-terminal system, developed in
the framework of this paper, is extended in a systematic
way to obtain a generalized cascaded control scheme for
MTDC systems. This generalized cascaded control scheme
can accommodate for voltage margin control as well as for
voltage droop control. The second contribution of the paper
is the investigation of the effect of the detailed modeling
of the current and voltage limits, by comparing the detailed
model with a simplified model. The model has been developed
and and implemented in MatDyn [18] at KU Leuven and
implemented and tested in EUROSTAG [19] at Tractebel
Engineering.
Sections II and III respectively provide a brief overview of
the converter and DC grid model and the control structure for a
two-terminal VSC HVDC system. In section IV, this structure
is extended to a MTDC system, resulting in a voltage margin
approach. Section IV also discusses the inclusion of a voltage
droop in the control structure, enabling power sharing amongst
different converters in case of a converter outage. Section V
analyzes reduced order models and compares the results with
those of the full model derived in the paper.
II. CONVERTER AND DC GRID MODELLING
The converter can be modelled as a controllable voltage
source u
c
behind a complex impedance Z
c
= R
c
+ X
c
con-
nected to the Point of Common Coupling (PCC), as shown in
Fig. 1. This complex impedance comprises both the converter
reactance and the transformer.
0000–0000/00$00.00
c
2013 IEEE
2 IEEE TRANSACTIONS ON POWER SYSTEMS, VOL. X, NO. X, MONTH 201X
i
c
i
+
−
u
s
i
R
c
i
L
c
i
u
c
i
Fig. 1. Single phase diagram converter station AC side.
1
1+τ
σ
·s
u
∗
cq
−
−
+
u
cq
1
R
c
+L
c
·s
i
cq
u
sq
1
1+τ
σ
·s
u
∗
cd
−
+
u
cd
1
R
c
+L
c
·s
i
cd
−ωL
c
∆u
cd
ωL
c
∆u
cq
Fig. 2. Converter model block diagram.
Transforming the three-phase equations to a rotating dq-
reference frame and assuming the grid voltage u
s
to be entirely
oriented in the q-direction, the converter equations become
R
c
i
cq
+ L
c
di
cq
dt
= u
cq
− ωL
c
i
cd
− u
sq
, (1)
R
c
i
cd
+ L
c
di
cd
dt
= u
cd
+ ωL
c
i
cq
. (2)
The assumption that the voltage at the PCC is entirely aligned
with the q-axis comes down to neglecting the effect of the
phase-locked loop (PLL).
A first order system models the time delay caused by the
processing and computation of the data and switching of the
converter power electronics
u
cq
+ τ
σ
du
cq
dt
= u
∗
cq
. (3)
A similar expression holds for u
cd
. Fig. 2 schematically
depicts the model.
The DC lines are represented by a lumped π-equivalent
scheme, as depicted in Fig. 3. The DC voltage dynamics at
bus i are determined by [2]
C
dc
i
du
dc
i
dt
= i
dc
i
+
i−1
X
j=1
i
dc
ij
−
N
X
j=i+1
i
dc
ij
, (4)
with C
dc
i
= C
dc,c
i
+
N
X
j=1
C
dc
ij
2
, (5)
with u
dc
i
and i
dc
i
respectively the DC voltage and current at
bus i, C
dc,c
i
the converter DC capacitance, i
dc
ij
the current
in the branch between buses i and j and C
dc
ij
the branch
capacitance.
i
dc
i
+
−
u
dc
i
C
dc,c
i
C
dc
ij
/2
R
dc
ij
i
dc
ij
L
dc
ij
C
dc
ij
/2
C
dc,c
j
i
dc
j
+
−
u
dc
j
DC line
Fig. 3. DC side lumped parameter model.
−
+
i
∗
cq
i
cq
K
i
1 +
1
τ
i
·s
AWU
+
+
+
u
sq
∆u
cq
u
∗
cq
0
|u
∗
cq
| ≤ u
cq
lim
u
∗
cq
(a) i
cq
current controller
−
+
i
∗
cd
i
cd
K
i
1 +
1
τ
i
·s
AWU
+
+
∆u
cd
u
∗
cd
0
|u
∗
cd
| ≤ u
cd
lim
u
∗
cd
(b) i
cd
current controller
Fig. 4. Decoupled inner current controllers.
When the DC current dynamics are taken into account by
modelling lumped inductances as shown in Fig. 3, the current
dynamics of the branches connected to bus i are modelled by
L
dc
ij
di
dc
ij
dt
+ R
dc
ij
i
dc
ij
= u
dc
i
− u
dc
j
, ∀1 ≤ j ≤ N, (6)
with R
dc
ij
and L
dc
ij
the DC branch resistance and inductance.
When the DC current dynamics are neglected, as discussed in
section V, the currents are eliminated as state variables.
III. TWO-TERMINAL VSC HVDC CONTROL
This section recapitulates the control of a two-terminal
scheme, a full detailed description can be found in [20]. The
first part briefly summarizes the decoupled current control
principles, with emphasis on the converter voltage limits.
The second part discusses different outer control loops. The
third part proposes an alternative implementation using a
cascaded structure of an active power controller and DC
voltage controllers at the two converters in order to increase
overall redundancy.
A. Decoupled dq current control
The VSC is controlled in a rotating dq-reference frame that
is synchronized with the system voltage. Fig. 4 shows the inner
current controllers, including an anti-windup (AWU).
The voltage limits u
cq
lim
and u
cd
lim
are determined by the
maximum modulation factor m
max
and the DC voltage u
dc
.
The maximum converter voltage magnitude u
c
lim
can thus be
written as
u
c
lim
= m
max
u
dc
. (7)
BEERTEN et al.: MODELLING OF MULTI-TERMINAL VSC HVDC SYSTEMS WITH DISTRIBUTED DC VOLTAGE CONTROL 3
The limits can be implemented such that the controller can
give priority to active or reactive power control. With the
decoupling terms defined as
∆u
cq
= ωL
c
i
cd
, (8)
∆u
cd
= −ωL
c
i
cq
, (9)
a modified q-decoupling term can be defined as
∆u
+
cq
= ∆u
cq
+ u
sq
. (10)
When under voltage limitation, the terms ∆u
cd
and ∆u
+
cq
are prioritized over the voltages that are used to control the
currents. When prioritizing active over reactive power control,
u
cq
lim
, the q-limit can be written as
u
cq
lim
=
q
u
2
c
lim
− ∆u
2
cd
if |∆u
+
c
| ≤ u
c
lim
u
c
lim
r
1 +
∆u
cd
∆u
+
cq
2
if |∆u
+
c
| > u
c
lim
, (11)
with the modified decoupling vector defined as ∆u
+
c
=
∆u
cd
+ ∆u
+
cq
. The voltage limit in the d-axis, u
cd
lim
, can
consequentially be expressed as
u
cd
lim
=
q
u
2
c
lim
− u
∗
cq
2
. (12)
Alternatively, equal priority can be given to both d-and q-
components by having
u
cq
lim
=
u
c
lim
r
1 +
u
∗
0
cd
u
∗
0
cq
2
if |u
∗
c
0
| > u
c
lim
, (13)
u
cd
lim
=
u
c
lim
r
1 +
u
∗
0
cq
u
∗
0
cd
2
if |u
∗
c
0
| > u
c
lim
, (14)
when under voltage limitations. In these expressions, u
∗
c
0
=
u
∗
cd
0
+ u
∗
cq
0
is the value of the converter voltage references
before limiting, as shown in Fig. 4.
B. Standard two-terminal outer control
The current control components i
cq
and i
cd
are physically
linked to the active and reactive power that the VSC injects
in the AC system. Fig. 5 shows the outer active and reactive
power PI-controllers. As an alternative to the reactive power
controller shown in Fig. 5b, one can use the d-axis current
to directly control the voltage at the AC terminal. Reactive
power control is not the main focus of this paper and will not
be discussed further.
In a two-terminal scheme, one converters controls the active
power (Fig. 5a) whereas the other controls the DC voltage at
its DC bus (Fig. 6). When giving priority to active power over
reactive power control, the current q- and d-limits, respectively
i
cq
lim
and i
cd
lim
in Figs. 5 – 6, are given by
i
cq
lim
= i
c
lim
, (15)
i
cd
lim
=
q
i
2
c
lim
− i
∗
cq
2
. (16)
−
+
P
∗
s
P
s
K
P
1 +
1
τ
P
·s
−i
cq
lim
i
cq
lim
i
∗
cq
0
|i
∗
cq
| ≤ i
cq
lim
i
∗
cq
(a) Constant P
s
controller
−
+
Q
∗
s
Q
s
K
Q
1 +
1
τ
Q
·s
−i
cd
lim
i
cd
lim
i
∗
cd
0
|i
∗
cd
| ≤ i
cd
lim
i
∗
cd
(b) Constant Q
s
controller
Fig. 5. Outer active and reactive power controllers.
−
+
u
∗
dc
u
dc
K
dc
1 +
1
τ
dc
·s
−i
cq
lim
i
cq
lim
i
∗
cq
0
|i
∗
cq
| ≤ i
cq
lim
i
∗
cq
Fig. 6. Outer DC voltage controller.
Alternatively, equal priority can be given to the active and
reactive power control, by having
i
cq
lim
=
i
c
lim
s
1 +
i
∗
0
cd
i
∗
0
iq
2
if |i
∗
c
0
| > i
c
lim
, (17)
i
cd
lim
=
i
c
lim
r
1 +
i
∗
0
cq
i
∗
0
cd
2
if |i
∗
c
0
| > i
c
lim
, (18)
with i
∗
c
0
= i
∗
cd
0
+ i
∗
cq
0
the current reference before limiting,
as shown in Figs. 5 – 6. Instead of giving equal priority to
both control components, this formulation can be generalized
to prioritize one current component over the other, without
completely compromising the other, by defining a constant
ratio α such that
i
cq
lim
=
i
c
lim
√
1 + α
2
if |i
∗
c
0
| > i
c
lim
, (19)
i
cd
lim
=
i
c
lim
q
1 +
1
α
2
if |i
∗
c
0
| > i
c
lim
. (20)
When observing the steady-state behavior of a converter when
under current limits, (15) – (16) results in the absence of any
reactive power injected by the converter. The approach from
(19) – (20) results in an operation at constant power factor
cos φ
c
such that
cos φ
c
=
1
√
1 + α
2
. (21)
This implementation guarantees operation at constant power
factor and can be of interest when the reactive power support
provided to the AC network has to be guaranteed when a
4 IEEE TRANSACTIONS ON POWER SYSTEMS, VOL. X, NO. X, MONTH 201X
−
+
P
∗
s
P
s
K
P
1 +
1
τ
P
·s
AWU
0
u
∗
dc
max
u
∗
dc
min
+
−
+
u
∗
dc
∆u
dc
u
dc
K
dc
1 +
1
τ
dc
·s
−i
cq
lim
i
cq
lim
i
∗
cq
0
|i
∗
cq
| ≤ i
cq
lim
i
∗
cq
controller
Fig. 7. Combined active power and DC voltage controller.
converter limit is hit. The implementation from (15) – (16)
prioritizes active power, which makes it a suitable candidate
for use in a DC voltage controlling converter. The steady-state
behavior resulting from (17) – (18) on the contrary, depends
on the values of the current reference before limiting i
∗
c
0
.
The reference currents are also reduced under AC fault
conditions, to limit the short circuit contribution by the con-
verter [21]. This can be easily included by having i
c,dq
lim
=
i
c,dq
lim,SC
when the voltage at the PCC drops. Instead of
limiting the currents under fault conditions, the priority can
also be shifted to reactive power control to fulfill the grid
code requirements concerning voltage support [22].
C. Redundant outer control
One of the disadvantages of the control implementation
from the previous part, is that the control structure as such
cannot cope with an outage or blocking of the DC voltage
controlling converter. Whereas an outage or blocking of the
power controlling converter only causes the power to drop,
it does not cause a system outage since the DC voltage
controlling converter can still control the DC voltage.
As the control of the DC voltage is crucial to the operation
of the power system, one can therefore duplicate the DC volt-
age control, as proposed in [21] and elaborated in [23] for the
power synchronization control, and mentioned in [24] for the
operation of a two-terminal scheme. Fig. 7 shows the control
structure for such a cascaded power control that has been
developed in the framework of this paper. By implementing
a correct control structure depending on the DC voltage at
the converter’s DC terminal, it is guaranteed that only one
converter at a time controls the DC voltage.
In the power controlling converter, the DC voltage is used
both as a reference signal and feedback signal as shown in
Fig. 7, hence only ∆u
dc
is retained as an input to the DC
voltage controller. By using the actual DC voltage u
dc
instead
of a reference value u
∗
dc
, one avoids counteracting actions of
the DC voltage controller when the DC voltage varies as a
result of an active power or DC voltage set-point change at
another converter in the system.
The controller ensures that the power is controlled as long as
the voltage stays within the limits u
hi
dc
min
and u
lo
dc
max
. As soon
1 2
3 4
0.979 0.855
0.903 0.793
0.441 0.437
0.466 0.462
0.441
0.419 0.422
0.444
1.005
0.996
0.997 1.003
Before fault
Fig. 8. Initial conditions of the test system.
as the voltage drops below u
hi
dc
min
or raises above u
lo
dc
max
, the
controller switches to voltage control, controlling the voltage
to one of the reference values, respectively u
∗
dc
min
and u
∗
dc
max
.
This is expressed mathematically as
u
∗
dc
=
u
∗
dc
min
if u
dc
≤ u
hi
dc
min
u
dc
if u
hi
dc
min
< u
dc
< u
lo
dc
max
u
∗
dc
max
if u
dc
≥ u
lo
dc
max
, (22)
with u
hi
dc
min
= u
∗
dc
min
+ B
dc
and u
lo
dc
max
= u
∗
dc
max
−B
dc
and
B
dc
a voltage deadband. As soon as the DC voltage reference
changes to either u
∗
dc
min
or u
∗
dc
max
, ∆u
dc
is set to zero and
the AWU of the active power PI-controller is activated to
avoid an overshoot when the control switches back to active
power mode. The deadband B
dc
prevents oscillating between
the two different operational regimes. The DC voltage can
start increasing or decreasing as a result of a power outage of
the DC voltage controlling converter. By providing a cascaded
structure with an inner DC voltage control as described above,
a backup control is provided in case the DC voltage controlling
converter fails. The remaining converter can now continue to
operate as a STATCOM. In the next section, this cascaded
general control structure will be used in a MTDC network.
