Nonvolatile semiconductor memory

TLDR: In this paper, a nonvolatile random access memory array comprising variable threshold insulated gate field effect transistor devices is described, where each memory element is comprised of a variable threshold field effect gate region located adjacent to a single sensing diffusion which is used to sense change in electrical potential of the sensing diffusion as the effective capacitance of the diffusion is coupled into a depletion region under the gate electrode during a READ cycle.

Abstract: A nonvolatile random access memory array comprising variable threshold insulated gate field effect transistor devices is described Each memory element is comprised of a variable threshold field effect gate region located adjacent to a single sensing diffusion which is used to sense change in electrical potential of the sensing diffusion as the effective capacitance of the diffusion is coupled into a depletion region under the gate electrode during a READ cycle Information is written into the memory by selectively applying a field in excess of a critical magnitude across the variable threshold dielectric to cause the device to assume a high or low threshold state To read information out of the memory, an inversion region extending from the sensing diffusion under the gate region is used to effectively switch, or reconfigure, the equivalent electrical circuit of the device to alter the capacitive loading presented by the device to the sensing diffusion depending upon whether the device is in a high or low threshold condition Various gate structures for improving the sensitivity of the memory are disclosed along with a single or multiple pulse sensing scheme which increases sensed voltage and reduces fatigue problems usually associated with conventional variable threshold semiconductor devices