Parallel processing system, esp. for constructing pipelines in a superscalar computer - contains decoder, group of parallel functional units for decoded instructions and further functional unit for control instruction when data memory is accessed.

TLDR: In this paper, a parallel processing system contains a decoder circuit for detecting instructions which can be performed simultaneously from simultaneously applied instructions, and each of a number of identical parallel functional units receives and performs an instruction from the decoder.

Abstract: The parallel processing system contains a decoder circuit for detecting instructions which can be performed simultaneously from simultaneously applied instructions. Each of a number of identical parallel functional units receives and performs an instruction from the decoder. Data are stored in a memory (6). A further functional unit, which does not receive instructions from the decoder, is only used to perform a control instruction when there is an access to the data memory. The functional units have an associated processing unit for performing arithmetic and logical operations on the received data. USE/ADVANTAGE - Faster processing speed.