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RAW Path ORAM: A Low-Latency, Low-Area Hardware ORAM Controller with Integrity Verification.

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This article is published in IACR Cryptology ePrint Archive.The article was published on 2014-01-01 and is currently open access. It has received 26 citations till now. The article focuses on the topics: Latency (engineering) & Controller (computing).

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Circuit ORAM: On Tightness of the Goldreich-Ostrovsky Lower Bound.

TL;DR: The proposed new tree-based ORAM scheme, Circuit ORAM, achieves (almost) optimal circuit size both in theory and in practice for realistic choices of block sizes and is an ideal candidate for secure multi-party computation applications.
Proceedings ArticleDOI

GhostRider: A Hardware-Software System for Memory Trace Oblivious Computation

TL;DR: This paper presents a new, co-designed compiler and architecture called GhostRider for supporting privacy preserving computation in the cloud, and formalized the approach and proved it enjoys MTO.
Posted Content

The Fallacy of Composition of Oblivious RAM and Searchable Encryption.

TL;DR: In this article, the applicability of ORAM for cloud applications such as symmetric searchable encryption (SSE) has been investigated using the Enron email corpus and the complete English Wikipedia corpus.
Book ChapterDOI

Formal Abstractions for Attested Execution Secure Processors

TL;DR: In this article, the authors provide formal abstractions for "attested execution" secure processors and rigorously explore the expressive power of these abstractions, showing both the expected and the surprising.
Book ChapterDOI

Circuit OPRAM: Unifying Statistically and Computationally Secure ORAMs and OPRAMs

TL;DR: An Oblivious parallel RAM (OPRAM) provides a general method to simulate any Parallel RAM (PRAM) program, such that the resulting memory access patterns leak nothing about secret inputs.
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