Journal ArticleDOI
Reconfigurable VLSI architectures for evolvable hardware: from experimental field programmable transistor arrays to evolution-oriented chips
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In this paper, an evolution-oriented field programmable transistor array (FPTA) is proposed, which allows evolutionary experiments with reconfiguration at various levels of granularity and can be used to automatically synthesize a variety of analog and digital circuits.Abstract:
Evolvable hardware (EHW) addresses on-chip adaptation and self-configuration through evolutionary algorithms. Current programmable devices, in particular the analog ones, lack evolution-oriented characteristics. This paper proposes an evolution-oriented field programmable transistor array (FPTA), reconfigurable at transistor level. The FPTA allows evolutionary experiments with reconfiguration at various levels of granularity. Experiments in SPICE simulations and directly on a reconfigurable FPTA chip demonstrate how the evolutionary approach can be used to automatically synthesize a variety of analog and digital circuits.read more
Citations
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Book
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Scott Hauck,André DeHon +1 more
TL;DR: This book is intended as an introduction to the entire range of issues important to reconfigurable computing, using FPGAs as the context, or "computing vehicles" to implement this powerful technology.
Proceedings Article
Polymorphic Electronics
TL;DR: The experiments demonstrate the polytronics concept and the synthesis of polytronic circuits by evolution by using a Field Programmable Transistor Array model, and the circuit topology is sought as a mapping onto a programmable architecture.
Journal ArticleDOI
Implementation of the SHA-2 Hash Family Standard Using FPGAs
TL;DR: The introduced architecture and the VLSI implementation of this standard performs much better than the implementations of the existing standard SHA-1, and also offers a higher security level strength.
Proceedings ArticleDOI
Evolving circuits in seconds: experiments with a stand-alone board-level evolvable system
TL;DR: The paper details an example of evolution on SABLES and points out to certain transient and memory effects that affect the stability of solutions obtained reusing the same piece of hardware for rapid testing of individuals during evolution.
On Polymorphic Circuits and Their Design Using Evolutionary Algorithms
TL;DR: The capacity of storing/hiding "extra" functions provides for watermark/invisible functionality, thus polytronics may find uses in intelligence/security applications, and the concept of polymorphic electronics (polytronics) is introduced.
References
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Book
Genetic Programming III: Darwinian Invention and Problem Solving
TL;DR: Genetically evolved solutions to dozens of problems of design, control, classification, system identification, and computational molecular biology are presented.
Book ChapterDOI
An Evolved Circuit, Intrinsic in Silicon, Entwined with Physics
TL;DR: A detailed case-study of the first such application of evolution directly to the configuration of a Field Programmable Gate Array (FPGA), resulting in a highly efficient circuit with a richer structure and dynamics and a greater respect for the natural properties of the implementation medium than is usual.
Journal ArticleDOI
Explorations in design space: unconventional electronics design through artificial evolution
TL;DR: Three hypotheses are formulated: in the "design space" of possible electronic circuits, conventional design methods work within constrained regions, never considering most of the whole, but evolutionary algorithms can explore some of the regions beyond the scope of contentional methods, raising the possibility that better designs can be found.
Journal ArticleDOI
Real-world applications of analog and digital evolvable hardware
Tetsuya Higuchi,Masaya Iwata,Didier Keymeulen,H. Sakanashi,Masahiro Murakawa,Isamu Kajitani,Eiichi Takahashi,Kenji Toda,N. Salami,Nobuki Kajihara,Nobuyuki Otsu +10 more
TL;DR: Six evolvable hardware chips and six applications currently being developed as part of MITI's Real-World Computing Project are introduced; an analog EHW chip for cellular phones, a clock-timing architecture for Giga hertz systems, a neural network EhW chip capable of autonomous reconfiguration, a data compression EHw chip for electrophotographic printers, and a gate-level EH W chip for use in prosthetic hands and robot navigation.
Journal ArticleDOI
Fault-tolerant evolvable hardware using field-programmable transistor arrays
TL;DR: The paper presents an evolutionary approach to the design of fault-tolerant VLSI (very large scale integrated) circuits using EHW (evolvable hardware), and compares two methods to achieve fault-Tolerant design, one based on fitness definition and the other based on population.