scispace - formally typeset
Proceedings ArticleDOI

Shade: a fast instruction-set simulator for execution profiling

Bob Cmelik, +1 more
- Vol. 22, Iss: 1, pp 128-137
TLDR
A tool called Shade is described which combines efficient instruction-set simulation with a flexible, extensible trace generation capability and discusses instruction set emulation in general.
Abstract
Tracing tools are used widely to help analyze, design, and tune both hardware and software systems. This paper describes a tool called Shade which combines efficient instruction-set simulation with a flexible, extensible trace generation capability. Efficiency is achieved by dynamically compiling and caching code to simulate and trace the application program. The user may control the extent of tracing in a variety of ways; arbitrarily detailed application state information may be collected during the simulation, but tracing less translates directly into greater efficiency. Current Shade implementations run on SPARC systems and simulate the SPARC (Versions 8 and 9) and MIPS I instruction sets. This paper describes the capabilities, design, implementation, and performance of Shade, and discusses instruction set emulation in general.

read more

Content maybe subject to copyright    Report

Citations
More filters
Proceedings ArticleDOI

ATOM: a system for building customized program analysis tools

TL;DR: ATOM as mentioned in this paper is a single framework for building a wide range of customized program analysis tools, including block counting, profiling, dynamic memory recording, instruction and data cache simulation, pipeline simulation, evaluating branch prediction, and instruction scheduling.
Journal ArticleDOI

Dynamo: a transparent dynamic optimization system

TL;DR: The design and implementation of Dynamo, a software dynamic optimization system that is capable of transparently improving the performance of a native instruction stream as it executes on the processor, are described and evaluated.
Proceedings ArticleDOI

A comparison of software and hardware techniques for x86 virtualization

TL;DR: It is found that the hardware support for Virtual Machine Monitors for x86 fails to provide an unambiguous performance advantage for two primary reasons: first, it offers no support for MMU virtualization; second, it fails to co-exist with existing software techniques for MM U virtualization.
Book ChapterDOI

Dynamic Storage Allocation: A Survey and Critical Review

TL;DR: This survey describes a variety of memory allocator designs and point out issues relevant to their design and evaluation, and chronologically survey most of the literature on allocators between 1961 and 1995.
Proceedings ArticleDOI

An infrastructure for adaptive dynamic optimization

TL;DR: This work provides an interface for building external modules, or clients, for the DynamoRIO dynamic code modification system by restricting optimization units to linear streams of code and using adaptive levels of detail for representing instructions.
References
More filters
Book

Smalltalk-80: The Language and its Implementation

TL;DR: This book is the first detailed account of the Smalltalk-80 system and is divided into four major parts: an overview of the concepts and syntax of the programming language, a specification of the system's functionality, and an example of the design and implementation of a moderate-size application.
Proceedings Article

Personal Communications

Book

Computer Organization and Design: the Hardware/Software Interface

TL;DR: The third edition of the book as mentioned in this paper has been updated with new pedagogical features, such as new information and challenging exercises for the advanced student, as well as a complete index of the material in the book and on the CD appears in the printed index.
Proceedings ArticleDOI

Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers

TL;DR: In this article, a hardware technique to improve the performance of caches is presented, where a small fully-associative cache between a cache and its refill path is used to place prefetched data and not in the cache.
Journal ArticleDOI

Memory coherence in shared virtual memory systems

TL;DR: Both theoretical and practical results show that the memory coherence problem can indeed be solved efficiently on a loosely coupled multiprocessor.