Patent
Stable output bias current circuitry and method for low-impedance CMOS output stage
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TLDR
In this article, a CMOS output circuit including a differential error amplifier (3) is operated to provide a stable quiescent bias current in an output MOSFET by causing a first current equal to a threshold voltage of a P-channel reference MOS-FET (M1) divided by the resistance of a reference resistor (R1) to flow through an N-channel current mirror control MOS/M4.Abstract:
A CMOS output circuit including a differential error amplifier (3) is operated to provide a stable quiescent bias current in an output MOSFET by causing a first current equal to a threshold voltage of a P-channel reference MOSFET (M1) divided by the resistance of a reference resistor (R1) to flow through an N-channel current mirror control MOSFET (M4). A first N-channel current mirror output MOSFET (M6) having a gate coupled to the gate of the N-channel current mirror control MOSFET (M4) and a drain coupled to a drain of the P-channel reference MOSFET (M1) causes a second current proportional to the first current to flow through the P-channel reference MOSFET (M1). The first current is controlled in response to feedback from the P-channel reference MOSFET (M1). A bias current in an error amplifier (3) is controlled in response to the N-channel current mirror control MOSFET (M4). The bias current in the error amplifier and the resistances of first (R2) and second (R3) resistive load devices of the error amplifier are scaled to produce a drive voltage which applies a gate-to-source quiescent bias voltage to a P-channel pull-up MOSFET (M11) which is substantially equal to and tracks with the gate-to-source voltage of the reference MOSFET (M1).read more
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References
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Journal ArticleDOI
Large swing CMOS power amplifier
K.E. Brehmer,J.B. Wieser +1 more
TL;DR: In this paper, a CMOS class AB power amplifier is presented in which supply-to-supply voltage swings across low-impedance loads are efficiently and readily handled.
Patent
Operational amplifier employing complementary field-effect transistors
TL;DR: An operational amplifier employing complementary MOSFET transistors includes first and second differential amplifiers respectively employing complementary conductivity type transistors as mentioned in this paper, and the input connections of the two different amplifiers connect in parallel to receive the same input signal.
Patent
Cmos operational amplifier with reduced power dissipation
TL;DR: In this article, the authors proposed a differential amplifier with a bias section comprised of complementary MOS elements (24, 26) connected to a single MOSFET (40) that furnishes constant current to the signal input section of differential amplifier section (20).
Patent
Current source frequency compensation for a CMOS amplifier
James B. Wieser,Ray A Reed +1 more
TL;DR: In this article, a CMOS linear amplifier is disclosed with a frequency compensation circuit that employs a Miller integrater construction in which the feedback capacitor is coupled by way of a noninverting amplifier operating at constant current and therefore does not load the inverting amplifier input or bypass the integrator amplifier.
Patent
Operational amplifier circuit
TL;DR: In this article, the operational amplifier circuit comprises a differencial amplifier input stage (21) for producing an amplified signal on the basis of an input voltage signal supplied thereto, an output stage (22) for output signal on basis of the inverting voltage signal, biasing circuit (24) operative to control the amounts of currents respectively flowing through the input stage and the output stage, a phase compensating circuit (23) for elimination of distortion in the voltage signal due to a noise on the power voltage, and a phase compensation supporting circuit (25) for restriction of the variation