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Patent

Time division multiplexed communication bus and related methods

John S. Loffink, +1 more
TLDR
In this paper, a time division multiplexed communication bus is proposed that provides a low latency, low pin count solution for communications among information handling systems, including modular computing systems, passthrough modules and chassis management controllers.
Abstract: 
A time division multiplexed communication bus is disclosed that provides a low latency, low pin count solution for communications among information handling systems. The time division multiplexed serial bus is advantageous in providing communications among modular computing systems, passthrough modules and chassis management controllers, as part of a modular computing system chassis.

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Patent

Synchronization, re-synchronization, addressing, and serialized signal processing for daisy-chained communication devices

Yang Pan, +3 more
TL;DR: In this paper, a data communication system has a number of communicatively coupled devices, including at least one slave-only device, including a clock and a bit clock, which are synchronized and re-synchronized.
Patent

Multiple slimbus controllers for slimbus components

Hans Georg Gruber, +4 more
TL;DR: In this article, the authors present methods, systems, apparatuses, and computer-readable media for controlling components connected to and/or otherwise associated with a data bus, including a plurality of processing devices having data bus management capability.
Patent

System, apparatus, and method for time-division multiplexed communication

Yang Pan, +3 more
TL;DR: In this article, a simplified bus arrangement using only three signal lines allows TDM data to be conveyed to or from a number of slave-only devices without the use of separate command line(s) and without any of the slaves having to operate as a bus master or even support a master operating mode.
Patent

Bus system and methods of operation thereof

Gerfried Krampl, +1 more
TL;DR: In this article, a bus system and methods for initialization and communication in a bus systems are presented, as well as a bus controller and an initialization method for the bus system itself.
Patent

Method and apparatus for mitigating memory requirements of erasure decoding processing

Hung-Hsiang Wang
TL;DR: In this article, a system and method corrects erroneous sections received in a memory by pre-filling at least a portion of memory with a pre-defined value is presented.
References
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Patent

Data transmission method, data transmission apparatus, data reception apparatus, and packet data structure

Akihiro Miyazaki, +3 more
TL;DR: In this paper, a data transmission apparatus for sequentially transmitting data in units of packets each containing transmission data to the receiving end, consisting of a reception unit for receiving the transmission data as an input signal, a packet formation unit for forming an uncompressed packet in which predetermined transmission data is stored as uncompressed data, and a compressed packet for which at least a portion of transmission data that follows the predetermined transmissions is compressed and stored as compressed data.
Patent

Dual bus communication system

Leslie Alan Baxter, +1 more
TL;DR: In this paper, a dual set of busses is used to provide close coupling between the data and voice services of the CS300 communication system, where one bus is a time division multiplex bus arranged for communication between port access circuits, and the other bus is used for interfacing both with the system peripherals and with the port access circuit.
Patent

Apparatus and method for communicating time-division multiplexed data and packet data on a shared bus

Robert Castellano
TL;DR: In this article, a method and apparatus for communicating both packet data and time division multiplexed (TDM) transmissions over a shared bus is presented, where each packet module is responsive to the state of the first and second control signals, and each module is further configured to transmit and receive data across the shared data communication bus.
Patent

Error correction with low latency for bus structures

Albert X. Widmer
TL;DR: In this article, transmission codes are used on the data vectors and location information is compared to determine a data vector having an error, and the received location information and determined location information are compared to correct the error.
Patent

Method and apparatus for dynamically allocating bandwidth for a time division multiplexed data bus

Matthew Castrigno, +1 more
TL;DR: In this paper, a data processing system includes a time division multiplexed (TDM) bus and a plurality of system components coupled to the TDM data bus, and a memory stores a table of allocation entries.