Transient and intermittent fault insertion

TLDR: Fault insertion circuits under programmable control and resident in an integrated circuit (LSI or VLSI) (10) insert transient and intermittent fault classes in addition to a permanent fault class into functional logic (24) on such integrated circuit as mentioned in this paper.

Abstract: Fault insertion circuits under programmable control and resident in an integrated circuit (LSI or VLSI) (10) insert transient and intermittent fault classes in addition to a permanent fault class into functional logic (24) on such integrated circuit (10). Specific fault types programmable for each fault class include a stuck-open fault and bridging faults both wired-AND and wired-OR. The programmable fault insertion circuitry on each integrated circuit interfaces directly or indirectly with a BIT maintenance controller (12). In addition to verifying test software, a fault tolerant system's error detection and recovery circuits may be verified by fault insertion testing using the transient and intermittent fault insertions. The controller (12) inserts a fault (11) into the integrated circuit (10) with control and initialisation data words and monitors the effect of the fault on the functional logic (24). The fault control and initialisation data words are stored in timers (52, 54, 56), a fault word register (14), and an intermittent fault mode logic (60), and are decoded under the control of the controller (12) and a slaved timing and control generator (17) to load a fault type generator (16) which responds by supplying a fault type signal (FAULTn) to a fault insertion interface (18) which thereupon inserts the required fault into functional logic (24) by appropriate modification of the coupling between an output signal (N) from and and an input signal FSIGNAL(N) to the functional logic (24).