Ultra-Low-Cost Design of Ripple Carry Adder to Design Nanoelectronics in QCA Nanotechnology
TLDR
In this article , the authors designed and implemented two new full adder circuits in QCA technology and then implemented ripple carry adder (RCA) circuits, which showed excellent performance in terms of QCA evaluation parameters, especially in cost and cost function.Abstract:
Due to the development of integrated circuits and the lack of responsiveness to existing technology, researchers are looking for an alternative technology. Quantum-dot cellular automata (QCA) technology is one of the promising alternatives due to its higher switch speed, lower power dissipation, and higher device density. One of the most important and widely used circuits in digital logic calculations is the full adder (FA) circuit, which actually creates the problem of finding its optimal design and increasing performance. In this paper, we designed and implemented two new FA circuits in QCA technology and then implemented ripple carry adder (RCA) circuits. The proposed FAs and RCAs showed excellent performance in terms of QCA evaluation parameters, especially in cost and cost function, compared to the other reported designs. The proposed adders’ approach was 46.43% more efficient than the best-known design, and the reason for this superiority was due to the coplanar form, without crossovers and inverter gates in the designs.read more
Citations
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Quantum‐dot cellular automata based design for overflow detection in two's complement arithmetic operation
TL;DR: In this article , the authors describe a low-power novel circuit for overflow detection in two's complement arithmetic operations using the quantum-dot cellular automata (QCA) to achieve the nanoscale design.
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Novel Reversible Comparator Design in Quantum Dot-Cellular Automata with Power Dissipation Analysis
TL;DR: The aim of this research is to design a 1-bit comparator building block based on reversible logic and implement it in the QCA with the minimum cell consumption, less occupied area, and lower latency, as well as to design it in a single layer.
Journal ArticleDOI
Nano‐scale design of full adder and full subtractor using reversible logic based decoder circuit in quantum‐dot cellular automata
J. C. Davis,Debashis De +1 more
TL;DR: In this article , a reversible nano-scale decoder circuit was designed by utilizing the new quantum-dot cellular automata (QCA) format of the QCA1 gate, which provides 34.25% less cell count with 54.37% less area than the best existing designs.
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A novel QCA circuit-switched network with power dissipation analysis for nano communication applications
TL;DR: In this article , the authors optimize the design and implementation of a QCA crossbar switch and use it in transmitter and receiver circuits to implement a circuit-switched network in QCA technology.
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Design of QCA based N-bit single layer shift register using efficient JK Flip Flop for nano-communication applications
TL;DR: In this paper , an efficient JK flip-flop design along with 2-bits, 3-bit, 4-bit and 8-bit shift registers which can be further scaled up to N-bits using the same proposed design of flipflop is observed.
References
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Logical devices implemented using quantum cellular automata
P. Douglas Tougaw,Craig S. Lent +1 more
TL;DR: This work examines the possible implementation of logic devices using coupled quantum dot cells, which use these cells to design inverters, programmable logic gates, dedicated AND and OR gates, and non‐interfering wire crossings.
Journal ArticleDOI
Adder and Multiplier Design in Quantum-Dot Cellular Automata
H. Cho,Earl E. Swartzlander +1 more
TL;DR: The unique QCA characteristics are utilizes to design a carry flow adder that is fast and efficient and the design of serial parallel multipliers is explored, which indicates very attractive performance.
Proceedings ArticleDOI
QCAPro - An error-power estimation tool for QCA circuit design
TL;DR: A novel probabilistic modeling tool (QCAPro) that can be used to estimate average power loss, maximum and minimum power loss in a QCA circuit during an input switching operation and provides an upper bound of power expended.
Journal ArticleDOI
Two-Dimensional Schemes for Clocking/Timing of QCA Circuits
TL;DR: In this article, different schemes for clocking and timing of the QCA systems are proposed; these schemes utilize 2D techniques that permit a reduction in the longest line length in each clocking zone.
Journal ArticleDOI
Coplanar Full Adder in Quantum-Dot Cellular Automata via Clock-Zone-Based Crossover
TL;DR: A coplanar QCA crossover architecture in the design of QCA full adders is used that leads to reduction ofQCA cell count and area consumption without any latency penalty and further investigates the impact of these gains on carry flow QCA adders.