Proceedings ArticleDOI
Use of VLSI in algebraic computation: Some suggestions
Hsiang-Tsung Kung
- pp 218-222
TLDR
VLSI designs for polynomial multiplication and division, which are basic functional modules in algebraic computation, are suggested.Abstract:
This paper reviews issues in the design of special-purpose VLSI chips in general, and suggests VLSI designs for polynomial multiplication and division, which are basic functional modules in algebraic computation.read more
Citations
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Journal ArticleDOI
Why systolic architectures
TL;DR: The basic principle of systolic architectures is reviewed and it is explained why they should result in cost-effective, highperformance special-purpose systems for a wide range of problems.
Journal ArticleDOI
Systolic VLSI Arrays for Polynomial GCD Computation
TL;DR: New systolic arrays that can lead to efricient VLSI solutions to both the G CD problem and the extended GCD problem are described.
Proceedings ArticleDOI
Architecture of the PSC-a programmable systolic chip
TL;DR: The CMU PSC is described, a single-chip microprocessor suitable for use in groups of tens or hundreds for the efficient implementation of a broad variety of systolic arrays.
Book ChapterDOI
Design of the PSC: A Programmable Systolic Chip
TL;DR: The programmable systolic chip is a high performance, special-purpose, single-chip microprocessor intended to be used in groups of tens or hundreds for the efficient implementation of a broad variety of syStolic arrays.
Bounded parallelism in computer algebra
TL;DR: This thesis examines the performance improvements that can be made by exploiting parallel processing in symbolic mathematical computation using dynamic scheduling methods in which subproblems are treated homogeneously and constructed a system for running computer algebra programs on a multiprocessor.
References
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Journal ArticleDOI
Why systolic architectures
TL;DR: The basic principle of systolic architectures is reviewed and it is explained why they should result in cost-effective, highperformance special-purpose systems for a wide range of problems.
Systolic Arrays for (VLSI).
TL;DR: A systolic system is a network of processors which rhythmically compute and pass data through the system, and almost all processors used in the networks are identical, so that a regular flow of data is kept up in the network.
Proceedings ArticleDOI
I/O complexity: The red-blue pebble game
Hong Jia-Wei,Hsiang-Tsung Kung +1 more
TL;DR: Using the red-blue pebble game formulation, a number of lower bound results for the I/O requirement are proven and may provide insight into the difficult task of balancing I/o and computation in special-purpose system designs.
Journal ArticleDOI
The Design of Special-Purpose VLSI Chips
TL;DR: Structured VLSI design proceeds from algorithm to logic cell to cell array to special-purpose chip, yielding cheap, powerful, and modular hardware that will permanently alter the systems landscape of the 80's.