Showing papers on "Analog-to-digital converter published in 1977"

An algorithmic analog-to-digital converter

Abstract: ANALOG TO DIGITAL CONVERTERS perform digital logic, analog comparison and analog arithmetic. While digital logic and analog comparison are readily performed in LSI form, analog arithmetic has been largely excluded. For this reason, most single chip A/D converters use counting algorithms (such as dual slope) which are slow but which require only modest analog capability. .4 cyclic A/D converter’ can provide both a means of implcmenting successive approximation A/D converters and a means of performing general purpose analog arithmetic. This type of converter is ideal for realization using precision-ratioed capacitors A prototy e circuit using an analog CMOS process has been fabricated . The circuit features A/D conversion rates of 5 ps per bit, infinite resolution, 10 bits accuracy, and programmability, on a 3200 square mil die area. A simplified schematic of the A/D converter is shown in Figure 1. Two amplifiers, five ratio-matched capacitors ( 5 1 C ~ ) and two switches form a recirculating analog shift register wlth a gain of two. Three switches permit loading the register with an analog input and adding or subtracting the reference. A comparator to test the sign of output V, completes the circuit. A timing diagram showing the circuit in operation is shown in Figure 2. To start conversion the register is cleared by bringing both V1 and V2 high while the input is sampled by connecting C1 to Vin. This forces both V, and Yy to zero. During the second half of the initial cycle, C1 is connected t9 the analog ground and VI is brought low. This causes a charge of Cl*VIN to flow from C1 to C2. Since C1 and C2 are equal in value this will cause V, to be equal to the sampled value of VIN, and the comparator will indicate the sign of the sampled voltage. To determine the next bit V2 is brought low and VI is raised, while C1 is connected to ground (if the sign was positive) or to VREF (if the sign was negative). This causes the voltage Vx to be transferred to Vy, while 17, is forced to zero. At this point the charge in C1 is k CL*VREF, and the charge in Cg is C~*VIN. 2

Digitally controlled power system

Abstract: A digitally controlled power system for controlling one or more power supplies having an output voltage including an analog to digital converter for sensing a difference between a reference voltage and the output voltage. Also included is a digitally controlled processor to provide a pair of control pulses to control the power supplies and a control memory to provide a program of instructions to said processor such that the processor provides a programmed change in the pulse width of the control pulses whereby the power supply provides a change in the output voltage.

Integrating analog-to-digital converter having digitally-derived offset error compensation and bipolar operation without zero discontinuity

Abstract: An analog-to-digital converter of the ramp-integrator type utilizing a special technique to reduce errors due to offset voltages. The integrator first is ramped up and then back to a reference level, by sequential application of opposite-polarity reference signals. A digital determination of net offset error then is made by comparing the total time of ramp-up-and-back with a fixed time period set by a clock generator. During the subsequent conversion operation, integration of the analog signal is controlled in accordance with the amount of net offset error so as to provide a feed-forward error correction. Integration is always in the same direction away from zero for analog signals of either polarity, thus avoiding the effects of discontinuity around zero input.

Clocked precision integrating analog to digital converter system

Abstract: An analog to digital converter wherein an incremental pulse width modulator controls first and second modes of operation of a bridge network of switches such that the bridge network of switches passes a precision current from a current source into a summing input of an integrator during the first mode of operation and away from the summing point of the integrator during the second mode of operation. The bipolar precision current from the bridge network of switches is summed with an analog current at the summing input of the integrator to cause the integrator to develop a voltage signal proportional to the integral of the sum of these currents. In response to the voltage signal and to clock pulses, the incremental pulse width modulator precisely controls the first and second modes of operation of the bridge network of switches and enables an output circuit to generate a digital representation of the amplitude of the analog current.

Offset correction apparatus for a successive approximation A/D converter

Abstract: An offset correction apparatus for a successive approximation analog to digital converter which will correct the A/D converter-derived offset voltage as referred to the analog input to within ±1mV of a preset reference over a wide temperature range.

Integrating analog-to-digital converter

Abstract: An integrating analog-to-digital converter particularly adapted to measure inertial instrument outputs for strap-down navigation. In the converter, an input signal is summed with a number of precisely quantized voltage pulses and is integrated. An error signal at the output of the integrator controls the rebalance duty cycle of the converter. Counting the net rebalance quanta over an interval results in an output count which is proportional to the input signal voltage.

Quantized feedback analog to digital converter with offset voltage compensation

Abstract: Analog to digital converter of the type in which an analog input signal is integrated and charge is applied to the integrating capacitor in predetermined measured quantities to offset or balance the effect of the input signal. A counter is incremented and decremented in accordance with the balancing charge to provide a count corresponding to the input signal. Means is included for eliminating errors due to offset voltages and imperfections in the virtual ground of the integrator, and the operating level of the integrator during a conversion is set independently of the sources which supply the balancing charge.

Analog-to-digital converter recalibration method and apparatus

Abstract: Automatic recalibration and testing of the accuracy of an analog-to-digital converter is accomplished in a converter of the type that compares the analog input signal with a linearly changing ramp referene signal and measures the time interval required for the magnitude of the reference signal to reach the level of the analog input signal from an initial level. In the invention, the linearly changing ramp reference signal is allowed to continue beyond the end of the converter's measuring phase and is thereupon compared with a datum voltage by a comparator which determines when equality between the two occurs. At the end of the measuring phase, a control pulse of fixed duration is generated and if the time of occurrence of equality is within the duration of that pulse, the converter is then operating within a suitable range of accuracy. The converter is automatically recalibrated by adjustment of the reference signal to make equality of the reference signal and the voltage datum occur in the center of the duration of the control pulse.

Analog to digital converter for protection relay apparatus

Abstract: PURPOSE:An analog to digital converter for use in a protection relay apparatus capable of overcoming the problems both with the countermeasure for overinputs and with the accuracy

Radar analog to digital converter

Abstract: An analog-to-digital converter is disclosed providing high speed operationor high resolution analog signal data. The converter utilizes the repetitive nature of the data by converting a portion of the signal corresponding to the changing component of the data. A smaller number of bits of information is thus converted from analog-to-digital form than is needed to represent the data. In addition to savings in hardware, a significant saving in conversion time is provided. The cancellation of static components of a radar signal moreover provides, within the system, a clutter-free signal.

Preamplifier for analog to digital converters

Abstract: A preamplifier using charge transfer techniques is formed on the same chip as a charge transfer analog to digital converter. The preamplifier then couples low level output sensors directly to the converter without need for a costly interfacing amplifier.

Large-Scale Digitizer System, Analog Converters

Abstract: Analog to digital converter circuits that are based on the sharing of common resources, including those which are critical to the linearity and stability of the individual channels, are described. Simplicity of circuit composition is valued over other more costly approaches. These are intended to be applied in a large-scale processing and digitizing system for use with high-energy physics detectors such as drift-chambers or phototube-scintillator arrays. Signal distribution techniques are of paramount importance in maintaining adequate signal-to-noise ratio. Noise in both amplitude and time-jitter senses is held sufficiently low so that conversions with 10-bit charge resolution and 12-bit time resolution are achieved.

Analog-to-digital converter using common circuitry for sample-and-hold and integrating functions

Abstract: An analog-to-digital converter employing a sample-hold, ramp generator and comparator in the conversion process combines the sample-hold and integrate functions in one operational amplifier. Provision may be made to derive the reference voltage, for the ramp generator, from the analog signal whereby automatic gain control is also obtained.

Optimum bit allocation for instantaneous floating point digitizers

Abstract: An Instantaneous Floating Point (IFP) digitizer consists of an analog to digital converter preceded by a gain ranging amplifier and sampler. IFP digitizers are commonly used to record non-stationary signals corrupted by non-stationary noise, the signal plus noise having a large dynamic range. Statistical analysis for an arbitrary number of converter bits, number of gain bits, and gain base reveal the undesirable effects an IFP digitizer may produce. Relationships are obtained between the number of converter bits, number of gain bits, and gain base which, when satisfied, avoid these undesirable effects and cause the IFP digitizer to perform essentially as a sampler. Further application of these relationships produces a solution to the problem of finding the minimum total number of bits and their allocation between the converter and gain words.