Showing papers on "CLEFIA published in 2019"

A Prospective Lightweight Block Cipher for Green IT Engineering

Abstract: This chapter provides general requirements to modern block ciphers required for implementation at lightweight cryptographic transformations for critical distributed environment applications with Green IT conformance. It is given an overview of well-known block ciphers and lightweight primitives PRESENT and CLEFIA, defined at ISO/IEC 29192-2. It is given a specification of the lightweight block cipher Cypress that was recently developed and presented in Ukraine. Cypress does not use heavy computation operations, nor require any precomputed tables that allows efficient hardware implementation. The Cypress performance in software is approximately three times higher than AES one on Windows, Linux and Android platforms.

Performance analysis of CLEFIA and PRESENT lightweight block ciphers

Abstract: The demand and fulfillment of various smart-needs is endangering day to day life posing security challenges. Deploying new security methods has become critical for resource-limited smart de...

A Very Compact Architecture of CLEFIA Block Cipher for Secure IoT Systems

Abstract: In this paper, a very compact architecture of the CLEFIA block cipher is presented. This architecture has a 128-bit plaintext/ciphertext and a 128-bit key and processes the data using a 4-bit datapath and therefore requires only a small number of hardware resources. The target of this architecture is ultra-low area devices for Internet of Things systems. The design was coded using the Verilog language and the BASYS3 board (Artix 7 XC7A35T) was used for the hardware implementation. The proposed implementation utilizes only 606 FPGA LUTs and 477 FFs and reaches a data throughput of 28 Mbps at 115 MHz clock frequency.

An Efficient ASIC Implementation of CLEFIA Encryption/Decryption Algorithm With Novel S-Box Architectures

Abstract: The demand for lightweight cryptography is inevitable considering the need for security and privacy in the resource constrained environment like active smart devices, RFID and smart edge nodes in Internet of Things (IoT). CLEFIA is one of the ISO/IEC 29191–2 standard lightweight cipher suitable for these applications. For the first time in literature, a novel Composite Field Approach (CFA) based architecture with 4-stage pipelining is derived for CLEFIA Substitution-1 box (S1 box) and a unique Algebraic Normal Form (ANF) based implementation is done for CLEFIA Substitution-0 box (S0 box). The proposed S-box architectures have achieved lowest area in-terms of Gate Equivalence (GE) compared to the traditional implementations. Thereby, a low-cost top-level CLEFIA encryption/decryption architecture is implemented by integrating the novel sub-blocks and its performance is analyzed. The proposed architecture has achieved a low area of 3282 GE, a high throughput of 592.58 Mbps and a low power consumption of 6.1 mW when synthesized using Semi-Conductor Laboratory (SCL) 180nm technology library. As a proof of concept, a working model of the proposed encryption/decryption architecture is prototyped on Basys-3 FPGA with the help of LogiCore VIO.

On Cryptographic Properties of Some Lightweight Algorithms and its Application to the Construction of S-Boxes

Abstract: We consider some approaches to the construction of lightweight block ciphers and introduce the definitions for «index of strong nonlinearity» and «index of perfection». For PRESENT, MIDORI, SKINNY, CLEFIA, LILLIPUT mixing and nonlinear properties were evaluated. We obtain the exact values of the exponents for mixing matrices of round functions and the upper bounds for indexes of perfection and strong nonlinearity. It was determined by the experiment that each coordinate function of output block is nonlinear during 500 rounds. We propose the algorithmic realization of 16x16 S-box based on the modified additive generator with lightweight cipher SPECK as a modification which does not demand memory for storage huge substitution tables. The best value of the differential characteristic of such S-box is 18/216, the minimal nonlinearity degree of coordinate functions is equal to 15 and the minimal linear characteristic is 788/215.

Optimization of Security and Privacy- Preserving Data Using an IoT CLEFIA Based Security LFSR

Abstract: Over the recent years, several smart applications like RFID's, sensor networks, including industrial systems, critical infrastructures, private and public spaces as well as portable and wearable applications in which highly constrained devices are interconnected, typically communicating wirelessly with one another, working in concert to accomplish some task. Advanced safety and security mechanisms can be very important in all of these areas. Lightweight cryptography enables secure and efficient communication between networked smart objects. The CLEFIA algorithm is a suitable lightweight cryptographic algorithm used in medium security systems. In order to increase safety and security mechanisms, modify CLEFIA are proposed which uses the Linear Feedback Shift Register (LFSR) to overcome the security weakness of the CLEFIA algorithm against attacks. In this paper an implementation of modify CLEFIA algorithm using C++ programming language. We have also compared the results with the standard CLEFIA.

IPA: an Instruction Profiling–Based Micro-architectural Side-Channel Attack on Block Ciphers

Abstract: Hardware performance counters (HPCs) are present in most modern processors and provide an interface to user-level processes to monitor their performance in terms of the number of micro-architectural events, executed during the process execution. In this paper, we analyze the leakage from these HPC events and present a new micro-architectural side-channel attack that observes the number of instruction counts during the execution of an encryption algorithm as side-channel information to recover the secret key. This paper explores the fact that the instruction counts can act as a side channel and then describes the instruction profiling attack (IPA) methodology with the help of two block ciphers, namely AES and CLEFIA, on Intel and AMD processors. We follow the principles of profiled instruction attacks and show that the proposed attack is more potent than the well-known cache timing attacks in literature. We also perform experiments on ciphers implemented with popular time fuzzing schemes to subvert timing attacks. Our results show that while the countermeasure successfully stops leakages through the timing channels, it is vulnerable to the instruction profiling attack. We validate our claims by detailed experiments on contemporary Intel and AMD platforms to demonstrate that seemingly benign instruction counts can serve as side channels even for block cipher implementations that are hardened against timing attacks. In addition to it, we present detailed experimentation to analyze the rationale behind the attack and also explore the performance of IPA on a countermeasure designed to subvert the cache-based attacks considering a case study on CLEFIA.

Key recovery method based on white-box block cipher CLEFIA analysis

Abstract: The invention discloses a key recovery method based on white-box block cipher CLEFIA analysis. The method comprises the steps of 1 selecting 16 lookup tables which are formed through two adjacent rounds of nonlinear transformation and comprise keys; 2, selecting an 8-in-32-out lookup table; 3, obtaining affine mapping; 4, generating two adjacent rounds of nonlinear lookup tables comprising the keys; 5, establishing an array; 6, generating two adjacent rounds of affine lookup tables comprising the keys; 7, establishing a coding set; 8, judging whether all vectors in the array are selected completely or not; 9, judging whether the 16 lookup tables are selected completely or not; and 10, recovering the keys. According to the key recovery method based on the white-box block cipher CLEFIA analysis provided by the invention, two continuous rounds of analysis are carried out on white-box block ciphers CLEFIA which provide protection in a white-box environment, so a space utilization rate andtime efficiency in a process of recovering the keys from the white-box block ciphers CLEFIA are improved.

Threshold Implementation of a Low-Cost CLEFIA-128 Cipher for Power Analysis Attack Resistance.

Abstract: Lightweight cryptography aims to satisfy the need for security and privacy in the resource constrained environment like smart cards, RFID and smart edge nodes in Internet of Things (IoT). CLEFIA is one of the ISO/IEC 29191-2 standard lightweight cryptographic algorithm suitable for these applications. Though CLEFIA is proven to be resistant to the cryptanalytic attacks, it is vulnerable to implementation attacks namely Side-Channel Attacks (SCAs). Power Analysis Attacks (PAAs) are the most popular type of SCA and the existing literature has shown successful PAA against CLEFIA. Hence there is a need for strong countermeasure against PAA. The contributions of this work are two-fold: (i) We have proposed a novel 16-bit serial architecture for CLEFIA-128 encryption with a Composite Field Architecture (CFA) based S1 box and Algebraic Normal Form (ANF) based S0 box (ii) A novel Threshold Implementation (TI) with 2-input shares is derived and implemented for the S0, S1 boxes. Thereby, two-shared top level CLEFIA architecture is constructed that shows sufficient first-order PAA resistance when validated using SAKURA-G FPGA board. The PAA categories considered are: (i) Evaluation style – Differential Power Analysis (DPA), Correlation Power Analysis (CPA), Mutual Information Analysis (MIA) with three different power models (ii) Conformance style –Test Vector Leakage Assessment (TVLA) Attack category. This work thereby becomes the first contribution to propose a first-order PAA resistance two-share TI-based CLEFIA implementation with a considerable area compromise, suitable for resource constrained applications.