Showing papers on "Decimal published in 1977"

Integrated binary-BCD look-ahead adder

Abstract: An improved system for adding two numbers together. The numbers may be expressed either in binary form or in binary coded decimal form (wherein each decimal digit is represented by its equivalent four binary bits). By taking advantage of "don't care" decimal input conditions, a minimal implementation of a carry look-ahead adder which can operate upon both types of numbers is obtained.

Setting system for protective relay

Abstract: PURPOSE:To provide an easy setting system and easy setting-constant modification for use on a protective relay which is designed for binary-digit setting; by converting decimal digits into binary digits through the function of a digital switch.

Current mode binary/BCD arithmetic logic unit with parity

Abstract: An improved binary/binary coded decimal arithmetic logic unit employing soft-saturating current mode logic gates operates on pure binary data or binary coded decimal (BCD) data. The unit performs 16 binary and 2 decimal arithmetic operations and 16 Boolean operations on two 4-bit plus parity input fields. The particular operation is determined by a 5-bit mode control signal. A carry-in input CIN, duplicate carry-in input CIND, parity check PCK input, invert parity input IP, decimal mode signal D, and decimal add input DA are also provided. The device generates a binary output resultant of the operation defined by the mode control signal. In addition to the arithmetic or logic operations, the unit performs parity checking, parity carry, and parity prediction operations on 4-bit plus parity binary and BCD fields.

On Simplification of Boolean Functions

Abstract: The first part of the article presents an iterative technique for simplifying Boolean functions. The method enables one to obtain prime implicants by simple operations on a set of decimal numbers describing the function. The second part describes a set theoretic approach to find a minimal cover of a switching function from the prime implicant decimal sets. A systematic process of search of redundant and selected prime implicant covers are performed by means of an algorithm.

Bdc corrected adder

Abstract: A BCD corrected serial adder includes an adder circuit and an asynchronous programmable logic array (PLA) connected to an output of the adder circuit. Whenever the sum of two bytes exceeds the decimal number 9 in the addition mode, the PLA simultaneously generates each bit of a byte which is equal to that sum plus the BCD equivalent of the decimal number 6. Whenever the sum of a minuend and the 2's compliment of the subtrahend is less than zero, the PLA simultaneously generates each bit of a byte which is equal to that sum plus the BCD equivalent of the decimal number 10. A circuit responsive to a carry supplied at an output of the PLA and to the most significant bit of the most significant digit of the subtrahend word generates a borrow which can be employed immediately by a main control circuit for making the necessary correction when the subtrahend word is larger than the minuend word.

Method of producing a binary code and means for using the same

Abstract: A method of representing decimal numbers in a quasi binary coded decimal (BCD) form is disclosed along with apparatus for using the same. The value assigned to a combination of binary bits is dependent on the location of the combination on the medium which is encoded. Use is made of the direction of motion of the medium to determine the position and hence the decimal value of specific combinations of binary bits. By interpreting certain combinations of bits in two different ways, an additional binary bit of information can be obtained from a given number of bits increasing the obtainable information from conventional BCD codes.

A New Representation for Decimal Numbers

Abstract: A new representation for decimal numbers is proposed. It uses a mixture of positive and negative radixes to ensure that the maximum value of a four bit decimal digit is 9. This eliminates the more complex carry generation process required in BCD addition.

Decimal system division system

Abstract: PURPOSE:To make the step unnecessary which again adds the divisor to the result of subtraction being negative, by storing the minuend to either of the both registers, even if the content of either of the both registers is negative.

Digital information conversion system

Abstract: A conversion system for a camera of a type controlled through computation of digital information. The system converts a coded digital value into a digital value of another coding. The code which comprises a gray code representing an integer part of the value and a code pattern representing a decimal part of the value is converted in such a manner that: The integer part is converted into a binary code while the decimal part is converted into a code to which a weight of 1/2, 1/4 or 1/8 is applied. With such a method of conversion employed, values set at 1/3 increment or decrement steps such as ASA film sensitivity values are readily converted into binary codes to facilitate the computing operation of the camera.

Addition and Subtraction

Abstract: Speed and accuracy can be attained if the following principles are used: 1 Try to get a rough estimate of the answer as a check on your working. This principle applies to everything in arithmetic, and will often draw attention to some obvious error such as a misplaced decimal. To get an estimate, simply ‘round off’ the numbers involved, e.g. adding 139 and 41.3 is roughly the sum of 140 and 41, so the answer is about 181. 2 Add both up and down, and look for ‘ten groups’, i.e. when two or more numbers, not too far apart, add up to 10, couple them together, and register them mentally as 10, e.g. should be mentally registered (going from right to left) as 10, 20, 21. 3 Be sure to place units, tens, hundreds, etc., in their correct position, with the units, etc., exactly under each other.

100n decimal digit unit information conversion operating system

Abstract: PURPOSE:To convert informations into n-decimal informations accurately, when n-decimal informations are represented in decimal system.

Binary/BCD-to-ASCII data converter

Abstract: Converter inputs multiple precision binary words, converts data to multiple precision binary-coded decimal, and routes data back to computer. Converter base can be readily changed without need for new gate structure for each base changeover.

Converter converts decimal into Moa-gilham code - for ground monitoring of aircraft flight condition

Abstract: The code converter converts a decimal code into a Moa-Gilham code for giving information on aircraft altitude in interrogate/replay systems. The 100 foot stages of the decimal code are first converted into a BCD code. A 100 foot converter converts this BCD code into the 100 stages of the Moa-Gilham code. The 1000, 10,000 and 100,000 foot stages are converted via 3 separate BCD converters. After multiplication all 3 figures are summed and the sum used to control a dual Gray code converter.

Teaching Decimal Math with Calculators

Abstract: (1977). Teaching Decimal Math with Calculators. Middle School Research Selected Studies: Vol. 4, No. 1, pp. 48-53.

Method and means for tracking digit significance in arithmetic operations executed on decimal computers

Abstract: Method and means are described for the tracking of digit significance upon operands arithmetically combined in a series of binary operations such as addition, subtraction, or shifting in a decimal computer. The digits are decimally encoded in a format having enough excess capacity such that nonsignificant digits are unique. As part of the arithmetic combining of the operand, pairs of digits of like order but possibly mismatched as to significance and by observing a predetermined rounding rule may also cause a carry value to be propagated to a digit position of higher order. In subtraction by complement addition, an additional carry is propagated to a higher order position conditioned upon there being either a local overflow, a nonsignificant subtrahend, or a nonsignificant minuend and a subtrahend less than an amount specified by a rounding rule. Between the two operands, this results in the rounding of the more precise operand to the least significant digit position of the less precise operand. The method and means are applicable to floating point, sign plus magnitude, radix and diminished radix complement number representation forms.

A unified decimal floating-point architecture for the support of high-level languages

Abstract: This paper summarizes a proposal for a decimal floating-point arithmetic interface for the support of high-level languages, consisting both of the arithmetic operations observed by application programs and facilities to produce subroutine libraries accessible from these programs What is not included here are the detailed motivations, examinations of alternatives, and implementation considerations which will appear in the full work