Showing papers on "H bridge published in 1991"

H-bridge flyback recirculator

Abstract: A circuit for discharging an inductive load of an H-bridge circuit at a controlled rate has been provided. When a first half of the H-bridge circuit is switched from a conductive state to a non-conductive state, the circuit clamps a first side of the inductive load, while creating a recirculation path to discharge the inductive load at a controlled rate. A similar circuit may be utilized when a second (complementary) half of the H-bridge circuit is switched from a conductive state to a non-conductive state wherein the similar circuit clamps a second side of the inductive load, while creating a recirculation path to discharge the inductive load at a controlled rate.

Design and operation of a fully integrated BiC/DMOS head-actuator PIC for computer hard-disk drives

Abstract: A fully integrated head-actuator power integrated circuit (PIC) for computer hard-disk drives is described including a 1-A, 10-W CMOS H-bridge class-B amplifier. Operation of the complementary MOS-transistor power output stage includes a small-signal on-track mode and a five-interval high-speed large-signal seek mode. Analysis of a seek event reveals that maximum power dissipation occurs during the acceleration and deceleration intervals. Inductive flyback during break-before-make operation is clamped by integral multicollector bipolar transistors as confirmed by measurements and PISCES simulations. The mechanisms, occurrence, and device design considerations of the output transistor's flyback current partitioning into type A (source) and type B (N/sub well/) collector and base (body) current components are analyzed. The concept and implementation of a synchronous clamp are introduced. Finally, performance and parasitic suppression considerations of an advanced self-isolated BiC/DMOS process and device arsenal are discussed. >

Current detecting circuit

Abstract: PURPOSE:To eliminate power loss, decrease temperature dependency, and realize high accuracy, by detecting current flowing through an output power element based on detection of potential variation of an N substrate or an N buried diffusion layer providing a current path. CONSTITUTION:Power MOS's (M1, M2, M3, M4) for output use are constituted in H-type, and drive a motor M. Diodes D1, D2, D3, D4 are built-in diodes of the power MOS's (M1, M2, M3, M4), respectively. In order to detect load current of the H bridge circuit, N substrate potentials VS1, VS3 of the upper side power MOS's (M1, M3) are compared through a voltage comparing circuit 100. For example, a case where M1, M4 are ON, and M2, M3 are OFF is considered. Since drain current ID1 flows through M1, M4, potential VS1 of M1 is lower than the source voltage VDD by an amount of ID1.RNSUB. On the contrary, since drain current does not flow through M2, M3, potential VS3 of M3 remains at VDD and potential difference between then is proportional to ID1. Consequently load current of the power MOS can be detected under a state where power loss does not present and temperature dependency scarcely exists.

Series resonant AC erase head drive circuit

Abstract: A series resonant AC erase head drive circuit apparatus for use with a miniaturized cartridge-type tape drive includes apparatus for generating a non-overlapping pulse wave forms and for driving switches, power switches and a voltage controlled DC current source. The pulse form generating and power switch driving apparatus includes a clock frequency input coupled to an externally supplied clock frequency signal and an enable input coupled to an externally supplied enable signal, and includes a plurality of power switch driving outputs. The power switch driving outputs provide a plurality of power switch control signals which include a non-overlapping interval. Power switches are coupled to the pulse form generating and power switch driving apparatus for switching power to the erase head in an AC fashion in response to the plurality of power switch control signals so as to allow current to flow through the erase head in a first direction for a first time interval, in a second, opposite direction for a second time interval and so as to prevent current from flowing through the erase head during the non-overlapping interval. The power switching apparatus comprises a series resonant H bridge circuit. Apparatus for providing a voltage controlled DC current source is coupled to the power switching apparatus. The erase head drive circuit is capable of operating at clock frequencies greater than 3.6 MHz.

Dc motor driving circuit

Abstract: PURPOSE:To prevent a power supply from short-circuiting and the concerned DC motor from its misoperation by providing an abnormality detecting circuit for discriminating combination of control signals not normal while an output inhibiting circuit for controlling an output of the control signal on four control signal wires of an H bridge drive circuits. CONSTITUTION:Since AND gates 11, 12 of an abnormality detecting circuit 10 are not opened when an H bridge driving circuit 7 is normal, an output signal is generated from a NOR gate 13. Thus, AND gate 21 to 24 of an output inhibiting circuit 20 are opened, and a DC motor 5 is normally or reversely rotated by supplying control signals A, B or control signals C, D, left as they are, to switching elements 1, 2 or switching elements 3, 4. Since no output is generated by the NOR gate 13 by opening the AND gate 11 and/or 12 in the case of outputting a control signal such as short-circuiting a power supply 6, it is prevented from short-circuiting by cutting off supply of the control signals A, C and/or the control signals B, D to the switching elements 1 to 4.

Power distributing circuit provided with overcurrent detection

Abstract: PURPOSE: To obtain a power distribution circuit having an accurate and reliable overcurrent protective function by providing an overcurrent detection circuit responsive to the state of a high potential current path and detecting a moment when the current in the high potential current path exceeds a predetermined level. CONSTITUTION: In order to feed a DC current to a load 14 appropriate signals are applied individually to the gates G1 , G4 of switches S1 , S4 which are thereby turned on. In order to prevent an overcurrent state breaking down the switches S1 , S3 arranged in the high potential side leg of an H bridge 10 or the load 14, overcurrent detectors of a control circuit respond to the individual electric state of the high potential legs L1 , L3 .