Showing papers on "Low-power electronics published in 1994"

The design of Low-Voltage Low-Power Analog Integrated Circuits and their Applications in Hearing Instruments

Abstract: Low voltage low power analog integrated circuits are applied in the area of battery operated systems They are of crucial importance for implantable and injectable devices such as pacemakers blood ow meters and auditory stimulators but they can also be found in portable radios hand carried radiotelephones pagers and hearing instruments This book discusses the design of analog integrated circuits in a low voltage low power environment following a systematic approach Subsequently attention is paid to low voltage low power electronics from a network theoretical point of view modeling of the devices in a low voltage low power environment and the design of various functional blocks ampli ers automatic gain controls and lters These three functions are the main functions that can be found in a hearing instrument Their application in a universally applicable IC for hearing instruments and its realization in silicon is treated separately

MOSFET technology for low-voltage/low-power applications

Abstract: Certain limits influence MOSFET technology in low-voltage applications. When we reduce the power supply voltage in modern short-channel devices, both active power dissipation and hot carrier reliability improve more than Linearly. However, strong off-state power consumption requirements and increasing numbers of FETs in each integrated circuit, combined with the physical limit to the subthreshold slope, force designers to choose between high performance and high density. >

Pulsed power supply CMOS-PPS CMOS

Abstract: Low power dissipation using conventional CMOS circuits can be achieved if the power supply lead is ramped repetitively between VDD and VSS During the power-down edge, the state of the chip is stored on parasitic capacitances This quasi-static CMOS circuit technique is called PPS (Pulsed Power Supply) CMOS and reduces the power dissipation over conventional 09 /spl mu/m p/sup +/ epi CMOS by 10 X

Silicon-on-quartz for low power electronic applications

Abstract: We have developed a novel Silicon-on-Quartz (SOQ) technology for fabricating SOI devices and circuits for low power electronics applications. SOQ substrate is fabricated by direct bonding of a silicon wafer with an etch-stop layer, and a quartz wafer, at room temperature, followed by thinning using surface grinding and selective etching techniques. We have successfully fabricated SOQ CMOS devices and demonstrated transistors with high mobility and low leakage currents. Thermal stress management techniques employed for the successful fabrication of the SOQ CMOS devices and the advantages of the SOQ approach for low power electronics are discussed.

A Strategy for Low Power Electronics

Abstract: A new generation of mobile and portable information systems is revolutionizing electronics and, in the process, driving a growing requirement for low power devices. At the heart of this revolution is an inexorable trend toward ever-smaller and more-powerful electronic systems poised to create huge new markets for hand-size mobile information products. This underlying trend in technology has enabled novel functionsat reduced costs and has improved reliability to the point that these products are becoming both affordable and practical for consumers.