Showing papers on "Operational amplifier published in 2023"
TL;DR: In this paper , a 0.3V rail-to-rail body-driven three-stage operational transconductance amplifier (OTA) is presented, where the bias current in each branch of the OTA is accurately set through gate-driven or bulk-driven current mirrors.
Abstract: This paper presents a novel 0.3V rail-to-rail body-driven three-stage operational transconductance amplifier (OTA). The proposed OTA architecture allows achieving high DC gain in spite of the bulk-driven input. This is due to the doubled body transconductance at the first and third stages, and to a high gain, gate-driven second stage. The bias current in each branch of the OTA is accurately set through gate-driven or bulk-driven current mirrors, thus guaranteeing an outstanding stability of main OTA performance parameters to PVT variations. In the first stage, the input signals drive the bulk terminals of both NMOS and PMOS transistors in a complementary fashion, allowing a rail-to-rail input common mode range (ICMR). The second stage is a gate-driven, complementary pseudo-differential stage with an high DC gain and a local CMFB. The third stage implements the differential-to-single-ended conversion through a body-driven complementary pseudo-differential pair and a gate-driven current mirror. Thanks to the adoption of two fully differential stages with common mode feedback (CMFB) loop, the common-mode rejection ratio (CMRR) in typical conditions is greatly improved with respect to other ultra-low-voltage (ULV) bulk-driven OTAs. The OTA has been fabricated in a commercial 130nm CMOS process from STMicroelectronics. Its area is about 0.002 mm 2 , and power consumption is less than 35nW at the supply-voltage of 0.3V. With a load capacitance of 35pF, the OTA exhibits a DC gain and a unity-gain frequency of about 85dB and 10kHz, respectively.
3 citations
TL;DR: In this paper , an analog implementation of a four-state adaptive oscillator is presented for the first time as a field-programmable analog array (FPAA) circuit, which can be used as an analog frequency analyzer.
Abstract: Adaptive oscillators are a subset of nonlinear oscillators that can learn and encode information in dynamic states. By appending additional states onto a classical Hopf oscillator, a four-state adaptive oscillator is created that can learn both the frequency and amplitude of an external forcing frequency. Analog circuit implementations of nonlinear differential systems are usually achieved by using operational amplifier-based integrator networks, in which redesign procedures of the system topology is time consuming. Here, an analog implementation of a four-state adaptive oscillator is presented for the first time as a field-programmable analog array (FPAA) circuit. The FPAA diagram is described, and the hardware performance is presented. This simple FPAA-based oscillator can be used as an analog frequency analyzer, as its frequency state will evolve to match the external forcing frequency. Notably, this is done without any analog-to-digital conversion or pre-processing, making it an ideal frequency analyzer for low-power and low-memory applications.
3 citations
TL;DR: In this paper , the authors proposed an amplifier circuit design suitable for low-voltage organic thin-film transistors (OTFTs), where an organic semiconductor is used as a passive load of the amplifier to reduce the area and failure probability.
Abstract: This paper proposes an amplifier circuit design suitable for low-voltage organic thin-film transistors (OTFTs). To overcome the issues common to low-voltage OTFTs, such as the yield, degradation, and performance differences between p-type and n-type TFTs, we design the circuit based on an inverter comprising only p-type transistors. The optimal bias voltage for the amplifier stage is provided through a bias circuit. The transistor performance degradation is compensated for by sharing the gate bias voltage (i.e. the main cause of degradation) between the bias and amplifier stages. In addition, an organic semiconductor is used as a passive load of the amplifier to reduce the area and failure probability. Test chip measurements demonstrate that the organic material operates as a resistor. The gain and cut-off frequencies of the proposed amplifier circuit can be adjusted by changing the size of the dinaphtho[2,3-b:2’,3’-f]thieno[3,2-b]-thiophene resistor, providing a maximum gain of 27 dB. The proposed circuit can operate continuously for over 100 min without significant characteristic changes. The operation of the bias circuit, when applied to a differential amplifier design, is also verified. The differential amplifier achieves a maximum common-mode rejection ratio of 25 dB.
2 citations
TL;DR: In this article , a two-stage cmos and single-stage CMOS operational has been compared and contrasted based on values of their performance parameters by using 0.18µm CMOS technology and the same power supply (5V).
Abstract: Operational amplifier exists in many numbers of configurations. The there are many types of the Operational amplifiers. These are: two stage, single stage, three stage and multistage amplifiers. Identifying the better op amp is important to get better application. The better op amp will be selected by considering the performance parameters (DC Gain, Slew Rate, Power Dissipation, etc.) of op amp. In project work a two stage cmos and single stage CMOS operational has been compared and contrasted based on values of their performance parameters by using 0.18µm CMOS technology and the same power supply (5V). Based on these values, By comparing the performance parameters single stage CMOS op amp is more stable and operate longer duration of time than two stage cmos op amp with small energy loss; while two stage op amp produces the output which is twice larger than single stage op amp, and also the noise in the output of two stage op amp is less than single stage op amp. So to get more output it is better to use two stage op amps. By results and reasons suitable choices for high gain and high performance applications are two stage topologies.
1 citations
1 citations
TL;DR: In this paper , two different types of op-amps were designed and tested at a lower voltage, and the LT Spice software was used to analyze the design of the op-amp.
Abstract: In this study, two different types of op-amps were designed and tested at a lower voltage. These op-amps use less power and can be used at a lower voltage than traditional op-amps, which makes them a good option for certain applications. The designer predicted that the power output would be high when there is a high voltage supply, and LT Spice software was used to analyze the design. Today, low-powered operational amplifiers are in high demand for many applications, such as in medical and communication systems. Some of the reasons why op-amps are in high demand are because they are versatile and have a wide range of applications. Additionally, they are often less expensive than more powerful amplifiers, which makes them a good option for certain applications. This op-amp has a good phase margin, so it can handle large loads with ease. It was created using a 180-millisecond process and CMOS technology. A 3-pF compensation capacitor and a 10-pF load capacitor are suitable for it, as the op-amp has a phase margin of 90.84 degrees...
TL;DR: In this article , the authors have designed filters for the elimination of electromyography noise and baseline wander noise present in ECG signal, and simulated the filters using various approaches, namely operational amplifier, a two-stage operational amplifier (2SOA), an operational transconductance amplifier (gm amplifier), the theoretical and practical values agree with each other.
07 Apr 2023
TL;DR: In this article , a CMOS based high gain self-bias double-stage amplifier was designed at 45nm technology node using Cadence Virtuoso, which was used for performance evaluation to find suitable amplifier topology and circuit schematic.
Abstract: Analog design is still a challenge for designer working at lower technology node due degradation in devices and circuit performance and increased short channel non ideal effects. Medical equipment needs a high gain low noise amplifier frequently in medical data acquisition and signal processing. CMOS differential amplifiers are suitable choice for designer due its high value of gain, noise margin and CMRR. Multiple stages of amplifiers further improve gain but at the cost other analog performance. Use of low and high VT transistors are preferred for the transistor connected to input signal and load respectively. Multiple stages of PMOS load are also improves the overall gain with the increase in number transistors. To achieve high gain self-bias operational transconductance amplifiers are suitable choice with higher W/L ratio of PMOS at output stage amplifier. CMOS based high gain self-bias double-stage amplifier were designed at 45nm technology node using Cadence Virtuoso. DC and transient analysis are used for performance evaluation to find suitable amplifier topology and circuit schematic.
16 Mar 2023
TL;DR: In this paper , a mathematical analysis of a typical driver connection scheme to an analog-to-digital converter (ADC) with a differential input is presented, where the influence of circuit solutions, as well as the most significant parameters of the driver on operational amplifiers, switched on at the input of ADC, on the equivalent bit depth of the ADC is considered.
Abstract: The article presents a mathematical analysis of a typical driver connection scheme to an analog-to-digital converter (ADC) with a differential input. The influence of circuit solutions, as well as the most significant parameters of the driver (Driver) on operational amplifiers, switched on at the input of ADC, on the equivalent bit depth of the ADC is considered. From a single point of view, an estimate is given of the reduction in the effective bit depth of the ADC, taking into account the signal delay in the parallel ADC driver. The purpose and novelty of this article is to present an analysis of the block diagram of the automatic monitoring and control system (MCS), in which the driver is located at a safe distance from the primary converter. In conclusion, the article presents the dependence of the total effective bit rate on the parameters of the ADC and the ADC driver.
04 Jun 2023
TL;DR: In this article , a modified Folded-Cascode circuit is proposed to make Folded Cascode structures an attractive configuration as a Transimpedance Amplifier (TIA) for being employed in Giga-bit per second optical communication receiver systems.
Abstract: The present study is devoted to articulating a modified Folded-Cascode circuit, to make Folded-Cascode structures an attractive configuration as a Transimpedance Amplifier (TIA) for being employed in Giga-bit per second optical communication receiver systems. Giga-bps communication receivers are highly necessitating circuits to isolate the input parasitic capacitance of the photodiode. The present modification makes Folded Cascodes comparable to the famous Regulated Cascode (RGC) structures by isolating this parasitic capacitor almost by the same quantity. The system is shown to be capable of operating at 2.5Gbps up to 8Gbps data rate with a fixed bandwidth. The paper analyzes and evaluates the designed circuit mathematically, and the obtained simulated results from Cadence using TSMC 65nm CMOS validate the suitability of the modified circuit as a transimpedance amplifier.
02 Jun 2023
TL;DR: In this article , the Miller compensation for high gain and phase margin has been used for sample hold Amplifiers and ADC applications, and the series resistor opamp has been designed for stability purposes.
Abstract: <p>In this paper, design of Two stage opamp has been introduced with Miller compensation for high gain and phase margin suitable for Sample Hold Amplifiers and ADC applications. Two-stage operational amplifiers provide a versatile and high-performance solution for numerous analog signal processing applications. By combining the benefits of a differential amplifier and a gain stage, two-stage op-amps offer improved gain, wider bandwidth, and increased output voltage swing compared to single-stage op-amps. Careful consideration of design parameters, compensation techniques, and performance characteristics enables the creation of efficient and stable two-stage op-amps that meet. The designed opamp has 77dB of gain and 72deg phase margin with a CMRR of 114dB and PSRR of -78.5dB compromising on 60% reduction in slew rate but the power dissipation is greatly reduced. Hence for stability purposes the series resistor Opamp can be used in Sample and Hold Amplifiers and ADC applications.</p>
TL;DR: In this paper , a low-pass filter with an operational amplifier and analog multiplier is presented. Butterworth filters are characterized by a flat peak frequency response curve with no bandpass fluctuations and a gradual decay to zero in the stopband.
Abstract: The goal of this paper is to demonstrate how to use Resistor-Capacitance circuit to build a low pass filter. One of the reasons for choosing to use the Butterworth filter was that it is characterized by a flat peak frequency response curve with no bandpass fluctuations and a gradual decay to zero in the stopband. It could also retain the same form regardless of orders or amplitudes. The low-pass filter is tuned to the RC circuit because its cutoff frequency is limited and the resistor's volume is smaller in this case. The authors realized that in the low-pass filter with operational amplifier and analog multiplier. To overcome the limitation and tackle the wave clipping problem, a negative feedback loop was introduced. On the output side, the authors also carry out research on latency reduction and make some progress. An operational amplifier was used to isolate the inputs from the outputs. In addition, the author reduced its latency and discussed its electrical principles.
TL;DR: In this article , a 14-bit 20MSPS analog-to-digital converter with a pipeline structure of 2.5bit-2.5 bit-2 bit was designed using the SMIC 40nm process and analog drive digital technology under a 1.2V power supply voltage based on a new type of ring amplifier.
Abstract: With the progress of integrated circuit technology, the intrinsic gain of transistors has become increasingly low, and the power consumption and complexity of OTA operational amplifiers have become higher, increasing the overall design difficulty of pipeline ADC. In order to improve the gain of the operational amplifier, improve the overall accuracy of the ADC, and reduce circuit power consumption, a 14-bit 20MSPS analog-to-digital converter with a pipeline structure of 2.5bit-2.5bit-2.5bit-2.5bit-2.5bit-2.5bit-2.5bit-2.5bit-2bit was designed using the SMIC 40nm process and analog drive digital technology under a 1.2V power supply voltage based on a new type of ring amplifier.The simulation results show that the SNDR of the input low-frequency signal pipeline ADC is 70.47dB, the SFDR is 85.5dB, and the ENOB is 11.45bit. When inputting high-frequency signals, the SNDR of the pipeline ADC is 68.35dB, the SFDR is 81.3dB, and the ENOB is 11.07bit.
01 Jan 2023
TL;DR: In this paper , the authors proposed a sinusoidal oscillator utilizing only one active element, current controlled current conveyor trans-conductance amplifier (CCCCTA), which can adjust the oscillation condition and frequency of oscillation with the help of DC bias current.
Abstract: This paper proposed a new design of sinusoidal oscillator utilizing only one active element, current controlled current conveyor trans-conductance amplifier (CCCCTA). This circuit utilizes a current conveyor trans-conductance amplifier (CCTA) with current controlling ability and only three passive components. Single resistor as well as both the capacitors used are grounded and not floating which is ideal for integration. Electronic adjustment of oscillation condition and frequency of oscillation is possible with the help of DC bias current just by changing its value. Computer simulations are being done using PSPICE 0.18 μm CMOS process parameters, and results obtained verify the performance of the proposed oscillator.
28 Mar 2023
TL;DR: In this paper , a low-pass filter (LPF) circuit with independent adjustment of various, incl. digitally controlled, pole frequency resistors, pole quality factor and transmission coefficient is proposed.
Abstract: A new low-pass filter (LPF) circuit with independent adjustment of various, incl. digitally controlled, pole frequency resistors, pole quality factor and transmission coefficient. The proposed low-pass filter is based on the use of the properties of a multi-differential operational amplifier that performs the functions of a signal adder. The peculiarity of the filter is that it has three inputs, with respect to which different transmission coefficients are implemented, incl. inverting (-1) and non-inverting (+1). To check these properties of a low-pass filter in the Micro-Cap environment, computer simulation of a specific circuit was performed on a multi-differential operational amplifier AD 8130. Mathematical expressions are given for the main parameters of the proposed low-pass filter, which allow parametric synthesis of elements of a specific circuit under given restrictions on the used element base.
TL;DR: In this paper , a three-stage operational amplifier (op-amp) with frequency compensation using cascade zero was proposed, and the op-amp was implemented in the 180 nm CMOS technology and achieved 86.96 MHz unity gain frequency, 51.7° phase margin at 32 pF load capacitor and 99.83 dB DC gain.
Abstract: Short channel MOSFET exhibits the characteristics of wide bandwidth and low DC gain. A low DC gain causes a high gain error and a narrow output linear range in the closed loop. The DC gains can be improved by using the cascade structure, but frequency compensation is required due to the increase in the number of poles. The output nodes of each stage in a cascade Common-Source amplifier have a cascade of zero, and this zero is cancelled out by the input node of the next stage. This paper proposes a three-stage operational amplifier (op-amp) with frequency compensation using cascade zero. This op-amp was implemented in the 180 nm CMOS technology and achieved 86.96 MHz unity–gain frequency, 51.7° phase margin at 32 pF load capacitor and 99.83 dB DC gain, that is, a 36.21 dB improvement over a two-stage op-amp with the same power consumption. The op-amp consumed 7.74 mW with a supply voltage of 1.8 V.
29 May 2023
TL;DR: In this paper , the authors considered circuitry techniques that provide an increase in the maximum output voltage slew rate of operational amplifiers in the structure of embedded microelectronic systems for various purposes, including a cascode input stage with a commonmode servo circuit and an intermediate stage based on a folded cascode.
Abstract: Circuitry techniques are considered that provide an increase in the maximum output voltage slew rate of operational amplifiers in the structure of embedded microelectronic systems for various purposes, containing in their structure a cascode input stage with a common-mode servo circuit and an intermediate stage based on a " folded" cascode. The results of computer simulation of the op amp are presented, showing that the introduction of two nonlinear corrective circuits into the original circuit increases SR by more than 5 times, and the use of additional differentiating correction circuits in the input stage of the Op-Amp increases its limiting values of SR by more than 10 times to the level of 4000 V / µs.
TL;DR: In this paper , the negative feedback in transistor amplifiers is studied and the authors show that negative feedback can become positive and of such a magnitude as to cause oscillations, but the danger of such an oscillation decreases considerably if the feedback loop is designed carefully.
Abstract: Feedback is an important concept in electronics. Suitable type of negative feedback permits an amplifier to obtain a higher bandwidth, lower output impedance, higher input impedance and reduce the nonlinear distortions. Gain of amplifiers which use negative feedback is less sensitive to variations in the values of circuit components and temperature. Under certain conditions, the negative feedback can become positive and of such a magnitude as to cause oscillations. Danger of such an oscillation decreases considerably if the feedback loop is designed carefully. This chapter studies the negative feedback in transistor amplifiers.
TL;DR: In this article , the authors studied some important circuits that can be made with Op Amps and 555 timer IC and showed that these circuits can be used to perform a variety of different operations.
Abstract: An Operational Amplifier, or Op Amp for short, is fundamentally a voltage amplifying device designed to be used with external feedback components such as resistors and capacitors between its output and input terminals. These feedback components determine the resulting function or “operation” of the amplifier and by virtue of the different feedback configurations whether resistive, capacitive or both, the amplifier can perform a variety of different operations, giving rise to its name of “Operational Amplifier”. All of the circuits in this chapter are designed with the 741 Op Amp. This chapter studies some of important circuits that can be made with Op Amps and 555 timer IC.
16 Mar 2023
TL;DR: In this paper , the authors investigated new structures of intermediate stages (ISs), which complement known publications on problems of increasing the speed response of Op-Amps, and showed that the relation of maximum output current of IS to its current in a static mode exceeds two orders, that has positive influence on SR.
Abstract: In this paper, the circuitry of the AB class intermediate stage for fast-acting Op-Amps, including those on CMOS and arsenide-gallium transistors, which allows to significantly increase the SR of Op-Amos, is developed. The purpose and novelty of the present paper is to investigate new structures of intermediate stages (ISs), which complement known publications on problems of increasing the speed response of Op-Amps. To achieve the aim the drawbacks of a very popular in automation and measurement devices architecture of an operational amplifier (Op-Amp) with a IS based on a "folded" cascode have been considered. As an example, the paper gives one of them - a nonlinear mode of operation of the IS, which does not allow to provide a large current overcharge correction capacitor Op-Amp, which has a negative impact on the maximum rate of increase of the output voltage (SR). In conclusion of article, results of computer simulation of static modes and dependence of output currents of IS on input voltage in environment LTSpice are discussed, showing, that the relation of maximum output current of IS to its current in a static mode exceeds two orders, that has positive influence on SR.
24 Jan 2023
TL;DR: In this article , a Double-Gate (DG) MOSFET-based differential amplifier has been designed in order to reduce Short-Channel Effect (SCE) in low-power devices.
Abstract: A Double-Gate (DG) MOSFET-based differential amplifier has been designed in this research work. This DG MOSFET has the capacity to reduce Short-Channel Effect (SCE) in low-power devices. In this differential amplifier, the differential input-differential output mode of operation has been analyzed for following parameters: (i) differential gain, (ii) common-mode gain, (iii) common mode rejection ratio, and (iv) frequency response. The results achieved are 22.64 dB, -224.22 dB, 246.86 dB, and 65 MHz, respectively. Based on these results, the designed differential amplifier is justified for the use in operational amplifiers as input stage, RF, and other low-power electrical/electronic devices.
10 Feb 2023
TL;DR: In this paper , a CFOA-based active filter configuration has been proposed, which employs two CFOAs and five admittances to realize an active Low Pass Filter, a Band Pass Filter and a High Pass Filter by appropriate admittance selection.
Abstract: In this paper, a Current Feedback Operational Amplifier (CFOA) based active filter configuration has been proposed. The described circuit topology employs two CFOAs and five admittances to realize an active Low Pass Filter (LPF), a Band Pass Filter (BPF) and a High Pass Filter (HPF) by appropriate admittance selection. In all the derived filter circuits, grounded and virtually grounded capacitors are being used, as it is preferred for IC implementation, for the design of filter circuits. To demonstrate the practicability of the proposed configuration, PSPICE simulation results are used, which match closely with the theoretical response obtained by using MATLAB. Experimental results using commercially available off-the-shelf CFOA IC AD844 have also been included to support the theoretical and simulated results.
TL;DR: In this paper , a two-stage CMOS operational amplifier with eight semiconductor switches (MOSFETs) was designed and simulated using OrCAD PSpice 17.4.
Abstract: The main objective behind this proposed design is to reduce the low offset voltage for the minimum value, so that its effect is reduced by two stage CMOS operational amplifier. The majority of operational amplifiers mainly consist of two inputs and one output. The signal coming out from the amplifiers is a description of the distinction and comparison between any two input signals that are independent on each other. Practically no voltage appears on the output and the offset voltage is close to zero in the event that there is no difference between the two input signals. In this paper, comprising two proposed circuits are designed and simulated using OrCAD PSpice 17.4, first, a circuit consisting of two stages is designed for a 180 nm technology operational amplifier, a designed two-stage amplifier circuit consisting of eight semiconductor switches (MOSFET). Second, a proposed circuit consist of a two stage OPAMP in conjunction with an auxiliary OPAMP. In the two proposed circuits, the MOSFET parameters are designed and excellent results obtained, including reduction of offset voltage and preservation of the gain value, where the offset voltage value of the Two-stage circuit was 71 µv and the offset value of the proposed design was equal to 21 µv as the offset voltage was improved and reduced by 70 %.
TL;DR: In this article , the idea of using transimpedance amplifiers, in lieu of operational amplifiers (OAs), to design capacitively coupled AC amplifiers was proposed.
Abstract: In this paper, we propose the idea of using transimpedance amplifiers, in lieu of operational amplifiers (OAs) or transconductance amplifiers (OTAs) to design capacitively coupled AC amplifiers. The idea is demonstrated with a current feedback operational amplifier (CFOA) as an active element, which is actually an architecture consisting of voltage buffers and current copiers (mirrors). This last characteristic is further exploited to make the corner frequency of the AC amplifier tunable by means of bootstrapping low-valued resistors with the output buffer. It is particularly suited to achieve very-low corner frequencies as needed in applications such as bio- or seismic signals. The idea is demonstrated with simulations and experimental results with a discrete implementation.
TL;DR: In this paper , the authors presented an effective design solution for current-shunt monitor (CSM) adapting to both positive and negative power supply applications, where the supply voltage is input common-mode voltage (CMV) of CSM ranged from −16 to 60 V.
TL;DR: In this paper , the authors proposed an automatic analysis of multiple-stage Op Amps based on circuit partitioning and functional block extraction, which can be applied in design space exploration, including finding the limitation in circuit topology, conducting initial sizing, and determining performance tradeoffs.
Abstract: Operational amplifier (Op Amp) is a special class of analog integrated circuits. Multiple-stage Op Amp design is of particular interest recently. However, analysis of this class of circuits has to be done manually and requires advanced skills. Automatic analysis of this class of circuits is studied in this paper, which takes a novel approach by circuit recognition and symbolic generation. Circuit recognition is deterministic, implemented by deterministic circuit partitioning and functional block extraction methods. Symbolic analysis of extracted circuit blocks can subsequently be performed with greatly reduced complexity while generated models and equations bear more useful information for circuit design. Symbolic results so generated can be applied in design space exploration, including tasks like finding the limitation in circuit topology, conducting initial sizing, and determining performance tradeoffs. This paper proposes the key algorithms for realizing the recognition of a few well-known functional blocks frequently used in CMOS Op Amp circuits and further explores the possibility of using the recognized circuit cells in combination with the gm/ID method for circuit sizing. Preliminary tests show that this approach is a potential candidate for locating the performance boundaries of multiple-stage Op Amps.
TL;DR: In this article , the authors proposed a zero-potential-biasing readout circuit that can suppress crosstalk caused by nonidealities of circuits, such as the offset and finite open-loop gain of the amplifiers and the ON-resistance of the switches used in the readout circuits.
Abstract: Crosstalk between the sensor element to be read and the other sensor elements in the sensor matrix constitutes a critical problem in reading passive matrix resistive sensors. Various zero-potential-biasing readout circuits have been proposed to solve the crosstalk problem, but crosstalk remains due to circuit nonidealities, such as the offset and finite open-loop gain of the amplifiers and the ON-resistance of the switches used in the readout circuit. Therefore, we propose a novel low crosstalk zero-potential-biasing readout circuit that can suppress crosstalk caused by these nonidealities of circuits. The main ideas of the proposed readout circuit to suppress crosstalk are: 1) including the unaddressed sensors and switches into the feedback loop that is formed by the biasing amplifier to remove crosstalk resultant from the finite open-loop gain of the amplifiers and the ON-resistance of the switches and 2) applying the correlated double sampling method to remove crosstalk caused by the offset of the amplifiers. In the measurement of the proposed readout circuit composed of actual commercial amplifiers and switches, the maximum readout error of the proposed readout circuit for an $8\times $ 8 resistor matrix is reduced to lpzrptPlus51.82% from the errors of −81.32% and −88.68% of the previous readout circuits selected for comparison.
24 Jan 2023
TL;DR: In this article , the feedback resistor is replaced by a capacitor to do the same function, since capacitor acts as an open circuit for DC signal, it also provides isolation between input and output.
Abstract: Abstract In linear integrated circuits, Opamp plays the vital role in the implementation of DC voltage amplification ,operational amplifier is mostly used in noninverting configuration. In this case, the feedback resistor is replaced by a capacitor to do the same function. Since capacitor acts as an open circuit for DC signal, it also provides isolation between input and output. The amplified voltage level is limited by the breakdown voltage of the transistors used to build Opamp and further the insulation breakdown limit of the capacitor. By making use of new technologies as silicon carbide technology is now in progress, the breakdown voltage of transistors can be made higher combined with high voltage engineering for capacitive insulation, this can be the beginning of the possibility for huge DC power generation beyond Analog Electronics.
TL;DR: In this article , the proposed PFRFC OTA employs a flipped voltage follower to reuse the input current to drive the transistors which are connected in feedback with HSCCM.