Showing papers on "Pushdown automaton published in 1990"

A Simple Construction Method of a Reversible Finite Automaton out of Fredkin Gates, and Its Related Problem

Abstract: A reversible finite automaton (RFA) is a backward deterministic automaton, i.e., it can uniquely retrace its move sequence if the inverse sequence of its outputs is given. In this paper, we show a simple method to construct an RF A from Fredkin gates, which are reversible and bit-conserving logic gates, and unit wires (unit delays) . The resulting circuit obtained by this method is \"garbage-less\" in the sense that it has no inputs to which constants must be supplied nor outputs from which garbage signals are put out. We also show that a one-dimensional revers­ ible partitioned cellular automaton, which are known to be com­ putation universal, can be constructed from Fredkin gates and unit wires as a closed (thus garbage-less) infinite circuit.

On the transition graphs of automata and grammars

Abstract: We saw (in section 1) that we can transform every pushdown automaton into a graph grammar generating its transition graph.

The complexity of ranking simple languages

Abstract: Ranking is the problem of computing for an input string its lexicographic index in a given (fixed) language. This paper concerns the complexity of ranking. We show that ranking languages accepted by 1-way unambiguous auxiliary pushdown automata operating in polynomial time is inNC (2). We also prove negative results about ranking for several classes of simple languages.C is rankable in deterministic polynomial time iffP=P #P , whereC is any of the following six classes of languages: (1) languages accepted by logtime-bounded nondeterministic Turing machines, (2) languages accepted by (uniform) families of unbounded fan-in circuits of constant depth and polynomial size, (3) languages accepted by 2-way deterministic pushdown automata, (4) languages accepted by multihead deterministic finite automata, (5) languages accepted by 1-way nondeterministic logspace-bounded Turing machines, and (6) finitely ambiguous linear context-free languages.

Two-way automaton computations

Abstract: Computations of a two-way automaton on an input tape are studied using the algebraic notion of trace ofa two-way computation {due to J. P. Pécuchet), and certain \"réductions\" of traces. This paper only deals with two-way computations which begin and finish at one or the other of the two ends of the input tape. The traces of such computations are characterized, and formulas are given which tell how traces are combined when the corresponding inputs are concatenated. Another tool for studying a two-way automaton (also due to Pécuchet) is the language of its control unit (considered over a \"double alphabet\"). This \"control language\" détermines the entire two-way automaton and this leads to formulas relating the control language and the language accepted by the two-way automaton itself. Résumé. Nous étudions les calculs d'un automate boustrophedon en employant la notion de trace d'un calcul {due à J. P. Pécuchet) et certaines « réductions » de traces. Cet article ne considère que les calculs boustrophedons qui commencent et finissent à l'un ou l'autre bout de la bande d'entrée. Nous décrivons les traces des calculs de ce type et donnons des formules qui indiquent comment se combinent les traces lorsque les entrées correspondantes sont concaténées. Un autre instrument dans l'étude des automates boustrophedons (dû aussi à J. P. Pécuchet) est le langage de l'unité de contrôle (exprimé sur un « double alphabet »). Ce « langage de contrôle » détermine l'automate boustrophedon et ceci conduit à des formules reliant le langage de contrôle et le langage accepté par l'automate boustrophedon. (*) Received June 1987, revised March 1988. This research was supported in part by U.S. Army Grant DAAG-29-85-K-0099 and U.S. Air Force Grant AFOSR-85-0186 through the Center for Mathematical System Theory, University of Florida, Gainesville, FL 32611. (*) Computer Science Department, University of Nebraska, Lincoln, NE 68588, U.S.A. Informatique théorique et Applications/Theoretical Informaties and Applications 0988-3754 90/01 47 20/S4.00/© AFCET Gauthier-Villars

Characterizing Unambiguous Augmented Pushdown Automata by Circuits

Abstract: The notions of weak and strong unambiguity of augmented push-down automata are considered and related to unambiguities of circuits. In particular we exhibit circuit classes exactly characterizing polynomially time bounded unambiguous augmented push-down automata.

The equivalence problem for real-time strict deterministic pushdown automata

Abstract: A comparison method is described for a pair of real-time strict deterministic pushdown automata, capable of deciding their equivalence.

Omega-Continuous Semirings, Algebraich Systems and Pushdown Automata

Abstract: In Kuich [4] we generalized the Kleene and the Parikh Theorem to l-complete semirings whose natural limit function is compatible with their partial order. In this paper we generalize in the same manner the following language theoretic result: A language is context-free iff it is accepted by a pushdown automaton.

The complexity of ranking simple languages

Abstract: Ranking is the problem of computing for an input string its lexicographic index in a given (fixed) language. This paper concerns the complexity of ranking. We show that ranking languages accepted by 1-way unambiguous auxiliary pushdown automata operating in polynomial time is inNC (2). We also prove negative results about ranking for several classes of simple languages.C is rankable in deterministic polynomial time iffP=P #P , whereC is any of the following six classes of languages: (1) languages accepted by logtime-bounded nondeterministic Turing machines, (2) languages accepted by (uniform) families of unbounded fan-in circuits of constant depth and polynomial size, (3) languages accepted by 2-way deterministic pushdown automata, (4) languages accepted by multihead deterministic finite automata, (5) languages accepted by 1-way nondeterministic logspace-bounded Turing machines, and (6) finitely ambiguous linear context-free languages.

Graphs, Automata, Petri Nets

Abstract: After briefly scetching the observation that traditionally informatics is based on the paradigm of sequential computations and on the metaphor of a single individual considered as a calculator, we take another standpoint and use the metaphor of a group of cooperating individuals to firstly develop some part of classical theoretical informatics from the point of view of specification of distributed and concurrent systems and secondly to introduce some more recent ideas. We start with finite sequential action systems which can be interpreted also as restricted syntax diagrams or program schemata, look at the related automata, study briefly forms of cooperation of such systems (which leads to pushdown automata and context-free languages) and then introduce the non-classical idea of Petri nets (and a slight generalization) as a general model for distributed concurrent systems. Hints on recent results on Petri nets obtained in our group are given.

The Input Output Timed Automaton - A model for real-time parallel computation

Abstract: In this paper we present the Input Output Timed Automaton IOTA model for the speci ca tion and veri cation of parallel real time digital systems Our model extends Nancy Lynch s IOA model Lynch a to allow for the inclusion of timing properties We have used the IOTA model to study a range of real time digital systems In particular we used it to specify and verify asynchronous circuit designs Bestavros a and to specify analyze and simulate behaviors of autonomous creatures Bestavros b In Bestavros a we developed a lan guage and environment for the executable speci cation of parallel real time interactive tasks based on the IOTA model A IOTA is an abstraction that encapsulates a real time task A system is modeled as a network of such IOTAs communicating with each other over channels A IOTA might be the speci cation or the actual implementation of a software hardware module This allows the representation of both the external environment and the programmed system along with the available computational resources in a unique framework IOTAs can be composed together to form higher level IOTAs A IOTA implements another if all external behaviors of the rst the implementation are also external behaviors of the second the speci cation We use timed possibility mappings to test for the implementation relationship This is the primary tool that is used to verify that an implementation meets the required speci cation This work was supported by DARPA N C It s Time to make Real Time Computing Real Real time computing systems are and will continue to play an increasingly vital role in our world Current real time systems are expensive to build and their properties are usually veri ed with ad hoc techniques or with expensive and extensive simulations Stankovic a Di erent components of such systems are extremely di cult to integrate with each other which adds to the cost and complexity of these systems Minor changes in any of these components result in another round of testing and xing Zave This brute force approach is not likely to scale up with future systems It has become clear that more work is needed in the area of real time systems if we are to meet the needs and challenges of the future Viewed simply any real time system has two parts an external environment and a pro grammed system The external environment consists of a number of devices such as sensors and actuators that interact with the real world The programmed system collects information from the sensors and responds by producing actions to drive the actuators The continual demands of the unintelligent external environment poses relatively rigid and urgent requirements on the per formance of the programmed system These requirements are usually stated in terms of real time constraints Examples of such systems include ballistic missile defense systems nuclear reactors robotics process control plants ight and space shuttle control real time databases real time communication networks etc Zave Zave The complexity of these systems coupled with an obvious lack of powerful speci cation and veri cation techniques made it impossible to assess their performance or even to judge their correct operation In the past few years di erent aspects of real time systems have been studied namely speci cation languages models and semantics However the absence of a uni ed formal frame work that addresses the a orementioned issues severely limited the usefulness of these studies Stankovic a Joseph In this paper we present a single framework for real time systems which makes it possible to see the relation between speci cation implementation correctness and performance issues The framework we suggest is based on the Input Output Timed Automaton IOTA read yota model We have used the IOTA framework to model robotics applications Bestavros b The tasks involved in a robotic application are diverse vision BBN motion control Brockett high level planning and behavioral speci cation Brooks etc and usually make use of very di erent resources special purpose image processors tailor made controllers and drivers general purpose processors etc Furthermore these tasks interact in a non trivial way Being able to specify and verify such complex systems in a single framework is both challenging and attractive The IOTA model An introduction In this section we introduce the Input Output Timed Automaton IOTA which is an extension of Nancy Lynch s Input Output Automaton IOA introduced in Lynch a to study discrete event systems e g distributed databases Lynch b The IOTA model provides a formal semantics de nition for Esprit Bestavros a a speci cation language for real time systems We used the IOTA model and the Esprit language to specify and analyze a number of real time applications Bestavros b Channels Signals Events and Actions In our model time is a measurable continuous in nitely divisible quantity We represent any point in time by a nonnegative real t Time intervals are de ned by specifying their end points which are drawn from the set of nonnegative rationals or nonnegative integers D Time intervals might be closed open or semi open If t and t are two points in time t t D then t t t t t t t t are the possible closed right closed left closed and open intervals respectively We use ft t g to denote any one of these cases A real time system is viewed as a set of interacting IOTAs IOTAs communicate with each other and with the external environment through channels A channel is an abstraction for an ideal communication media Among others a channel might represent a simple physical wire that carries an electrical signal be it binary or analogue It might represent a Unix like socket or pipe Or it might represent a function invocation and a possible transfer of information through function calls and returns The information that a channel carries is called a signal A signal consists of a sequence of events An event underscores the instantiation of an action at a speci c point in time Figure illustrates the notions of channels actions events and signals Our concept of actions is similar to that used in the IOA model Lynch a In particular we view actions as tokens that are generated as outputs and consumed as inputs More formally let ai be an action of a IOTA A that was signaled at time ti and remained active till time tj where tj ti when another action aj was signaled The tuples ai ti and aj tj are called events Furthermore the sequence of events a t a t a t ak tk is called a signal As in Lynch a channels are classi ed as internal or external and as input or output Signals from external channels are observable from outside the IOTA Signals from internal chan nels are only observable locally Signals from input channels are uncontrollable since they are supplied by the environment or by other IOTAs Unlike other models Hoare they cannot be blocked Signals from output channels on the other hand are the way an IOTA reacts to the outside stimuli Thus a IOTA can be considered as performing a mapping from its external input signals to its external output signals In a sense it acts as an actor in a data ow graph Veen As was done in Lynch a we formally de ne the signature sig A of a IOTA A to be a partition on the channels of A into three disjoint sets of input output and internal channels For a IOTA A we denote these sets by in sig A out sig A and int sig A respectively The set consisting of both input and output channels is the set of external channels observable from outside the IOTA We denote this set by ext sig A where ext sig A in sig A out sig A The set consisting of both output and internal channels is the set of local channels These are the locally controlled channels of A We denote this set by loc sig A where loc sig A out sig A int sig A We denote the set of all the channels of a IOTA A by channels A where channels A in sig A out sig A int sig A By remained active we mean that no other actions were activated on the same channel during that period The interval for which the action ai was active is ti tj and consequently signals and actions that they carry XXXXXXXXXXz J J J J J J J J J J

On the Power of Bounded Concurrency II: The Pushdown Automata Level

Abstract: This is the second in a series of papers on the inherent power of bounded cooperative concurrency, whereby an automaton can be in some bounded number of states that cooperate in accepting the input. In this paper we deal with the level of pushdown automata. We are interested in differencies in power of expression and in discrepencies in succinctness between variants of pda's that incorporate nondeterminism, pure parallelism and bounded cooperative concurrency. In particular, our results provide further evidence for the general observation that the latter feature provides inherent exponential power, in both upper and lower bound senses, regardless of whether or not the two former features are also present. While we use the language of statecharts to capture these features, our results are extremely robust, and hold also for bounded versions of virtually all other concurrent languages.

The expressibility of nondeterministic auxiliary stack automata and its relation to Treesize bounded alternating auxiliary pushdown automata

Abstract: Two aspects of nondeterministic auxiliary stack automata (NAuxSA) are studied in this paper The first is regarding the expressibility of NAuxSA More specifically, it is shown that the polynomial hierarchy can be characterised in terms of AuxSA with resource bounds The second aspect is a duality relation between NAuxSA and alternating auxiliary pushdown automata (Alt-AuxPDA) connecting time bounds on the former with treesise bounds on the latter

A simple realization of a parallel device recognizing regular trace languages

Abstract: This paper studies parallel devices recognizing trace languages. We introduce a concept of an asynchronous automaton with e-moves and show that for a given regularly defined trace language there exists a simple version of an asynchronous automaton with e-moves recognizing this language.

Aspects and prospects of theoretical computer science : 6th International Meeting of Young Computer Scientists, Smolenice, Czechoslovakia, November 19-23, 1990 : proceedings

Abstract: Methods for generating deterministic fractals and image compression.- Optimum simulation of meshes by small hypercubes.- Seven hard problems in symbolic background knowledge acquisition.- Subsequential functions: Characterizations, minimization, examples.- Past proves more invariance properties but not pca's.- Complexity issues in discrete neurocomputing.- Two-way reading on words.- Proofs and reachability problem for ground rewrite systems.- Problems complete for ?L.- Constructive matching - Explanation based methodology for inductive theorem proving.- Characterizing complexity classes by higher type.- The distributed termination problem : Formal solution and correctness based on petri nets.- Greedy compression systems.- A DIV(N) depth Boolean circuit for smooth modular inverse.- Learning by conjugate gradients.- Monoids described by pushdown automata.- Optimal parallel 3-colouring algorithm for rooted trees and its application.- Hierarchies over the context-free languages.- A hierarchy of unary primitive recursive string-functions.- Minimizing picture words.- Remarks on the frequency-coded neural nets complexity.- Picture generation using matrix systems.- Representing heuristic-relevant information for an automated theorem prover.- A new method for proving lower bounds in the model of algebraic decision trees.- Area time squared and area complexity of VLSI computations is strongly unclosed under union and intersection.- Decision procedure for checking validity of PAL formulas.

Some Properties of Zerotesting Bounded One-Way Multicounter Machines

Abstract: Deterministic and nondeterministic one-way multicounter machines with bounds on the number of zerotests are studied. First, we establish a fine hierarchy of zerotesting bounded deterministic counter machine languages. Second, we show that a nondeterministic two-counter machine with 2 zerotests is able to recognize a language which cannot be accepted by any deterministic sublinear zerotesting bounded multicounter machine.

Monoids Described by Pushdown Automata

Abstract: We define and study a family of monoids, called (PR)-monoids, of rather low complexity. A (PR)-monoid is a monoid the multiplication of which may be realized by a deterministic pushdown automaton. We prove that this family contains rational monoids, free groups and is closed under finitely generated submonoids and free products. We also consider other families of monoids of the same complexity than (PR)-monoids.

The dynamics of digital circuits with memory for ternary signals

Abstract: The paper examines a digital automaton with memory operating in the ternary alphabet (0, 1, θ). The problem of analytical determination of ternary processes on automaton outputs and inside the automaton from given ternary processes on the automaton inputs is considered. An algorithm is proposed reducing this problem to standard determination of the processes in an automaton with the alphabet (0, 1).

Automaton models of swapping and replacement systems for computer memory

Abstract: We investigate various swapping and replacement systems for computer memory using infinite deterministic and nondeterministic automaton models. Some propositions are proved which lead to exact or approximate determination of the set of reachable memory states.