Showing papers on "Reference architecture published in 1977"

Information content of CPU memory referencing behavior

Abstract: The memory reference trace of a computation is modeled as a probabilistic process and the information content of that process is derived. Techniques are developed for analyzing the effectiveness of the addressing architecture and Memory/CPU traffic of existing machines with respect to the information theoretic bound for a given trace.Several techniques for analyzing particular aspects of addressing architecture are also developed. Possible areas of improvement for addressing architecture, compilers, and memory architecture are suggested for performance enhancement.

Measurement and Evaluation of Alternative Computer Architectures

Abstract: The Army/Navy Computer Family Architecture Committee has developed an approach for quantifying the relative performance of alternative computer architectures.

Direct-execution computer architecture

Abstract: The Direct-Execution Architecture is a language-directed computer architecture. It can accept a highlevel-language program and directly executes it without compilation, assembly, linkage editing or loading. It offers a means to eliminate compilers, loaders etc. and attacks the problem of mounting software cost. In addition, the advent of microprocessors has demonstrated that highly complex digital hardware can be built reliably and inexpensively. Using this hardware to implement the Direct-Execution Architecture redistributes apportionment of costs between the hardware and software. The paper surveys the Direct-Execution Architecture, presents the relationship between language and architecture, and explains how a Direct-Execution system works. It also brings up the use of Direct-Execution for a highly interactive program writing, debugging, execution system. With this system, program writing could proceed like English composition. This paper then discusses the issue of a single high-level machine language, and the potential role of the interpreters. Finally, it attempts to fortell what could happen to the Direct-Execution Architecture in the next five to 10 years.

Direct-Execution Computer Architecture.

Abstract: The Direct-Execution Architecture is a language-directed computer architecture. It can accept a highlevel-language program and directly executes it without compilation, assembly, linkage editing or loading. It offers a means to eliminate compilers, loaders etc. and attacks the problem of mounting software cost. In addition, the advent of microprocessors has demonstrated that highly complex digital hardware can be built reliably and inexpensively. Using this hardware to implement the Direct-Execution Architecture redistributes apportionment of costs between the hardware and software. The paper surveys the Direct-Execution Architecture, presents the relationship between language and architecture, and explains how a Direct-Execution system works. It also brings up the use of Direct-Execution for a highly interactive program writing, debugging, execution system. With this system, program writing could proceed like English composition. This paper then discusses the issue of a single high-level machine language, and the potential role of the interpreters. Finally, it attempts to fortell what could happen to the Direct-Execution Architecture in the next five to 10 years.

Selecting a Military Computer Architecture

Abstract: Selecting or even designing a computer architecture is at best as much a black art as a science. The problem is particularly difficult when one tries to choose an architecture meant to serve a very broad range of users whose present and future requirements are poorly understood. This article describes the activities of a joint Army/Navy Selection Committee, which was charged with the task of selecting a single computer architecture to be used as the basis for a new military computer family. The range of applications for military computers is broad and ill defined; how the committee tried to cope with this problem should be of interest to others who are interested in measuring, designing, or selecting computer architectures.

Influence of High-Level Languages on Computer Architecture

Abstract: These papers have been entitled ‘Influence of High Level Languages on Computer Architecture’. In fact what will be presented attempts to cover both this topic and the opposite i.e the influence of computer architecture on high level languages. The reason for doing so is that some new concepts have been recently introduced, which have an impact on both architecture and languages. One such concept is that of ‘parallelism’ which will be thoroughly investigated in these papers. More specific implications like Algol-machines, APL machines will only be touched upon as they will be covered by Dr Wilner (7). These lectures will thus be divided into three chapters.

Another general purpose computer architecture

Abstract: This paper describes an architecture for a general purpose computer system. This architecture has inherent characteristics that are oriented toward the execution of modular software. The addressing mechanism provides process and procedure integrity. The process management mechanism directly supports interprocess communication. Software development assistance, minimization of operating system complexity and efficient use of system processing resources are typical requirements that influenced this design. The set of architectural characteristics which seemed to satisfy these r e q u i r e m e n t s w a s chosen rather arbitrarily and includes: o Concurrent processing of modular programs. o Asynchronous multiprocessing. o Addressing protection within a process as well as between processes. o A logical address space for each process larger than system primary memory. o Dynamic relocation of data and instructions. The central system organization would consist of: o A primary memory with a maximum address space of 16 million (2**24) 36-bit, tagged , words. o A single processor dedicated to inter-process communication. o A mix of other processors which may include:-One or more general purpose processors.-One or more input/output processors.-Zero or more special purpose processors. o A bus over which the above communicate. A design philosophy of the system is that all processes perform services on behalf of some person or process. For example, executing a program is performing a service for the user who initiates it. Processes are authorized to perform services by means of interprocess messages. For example , the command interpretation process of an operating system would activate a program by sending it an appropriate authorization message. Authorization messages revert to, i.e., are sent back to, the requestor of a service upon comgletion of that service. Each process is provided with an authorization queue and a reversion queue, which contain, respectively, service request authorization messages and reverted authorization messages. A process may proceed in its execution only under the authority of the message currently at the head of its authorization queue. If there is no message in this queue then the process is blocked. A process may retrieve reverted authorization messages from its reversion queue at its discretion. Each processor's instruction set includes several instructions that cause the manipulation of authorization messages. The message manipulation instructions are relayed to a special processor, called a system management processor, which is the only processor permitted to modify the authorization and reversion queues of a process. Access …