Showing papers on "Voltage-controlled oscillator published in 1978"

Tamed Frequency Modulation, A Novel Method to Achieve Spectrum Economy in Digital Transmission

Abstract: This paper describes a new type of frequency modulation, called Tamed Frequency Modulation (TFM), for digital transmission. The desired constraint of a constant envelope signal is combined with a maximum of spectrum economy which is of great importance, particularly in radio channels. The out-of-band radiation is substantially less as compared with other known constant envelope modulation techniques. With synchronous detection, a penalty of only 1 dB in error performance is encountered as compared with four-phase modulation. The idea behind TFM is the proper control of the frequency of the transmitter oscillator, such that the phase of the modulated signal becomes a smooth function of time with correlative properties. Simple and flexible implementation schemes are described.

High frequency voltage generator

Abstract: This high frequency voltage generator which may be used particularly in surgery for supplying an electric bistoury, comprises a power oscillator operating an output transformer. A chopping supply is placed in the direct control chain of the power oscillator. The output voltage of the generator is controlled by a first regulation loop whose reference value is increased by means of a positive feedback proportional to the output current.

Capacitive intrusion detector circuitry utilizing reference oscillator drift

Abstract: Protected objects are connected together to form an antenna. Preferably, the cabinet for the detector circuitry is also included in the antenna. The antenna is excited by a voltage controlled oscillator (VCO). The capacitive reactance of the antenna changes when an intrusion occurs. This causes the frequency of the VCO signal to undergo an instantaneous change. A phase comparator compares the phase of the VCO signal with the phase of a reference oscillator signal. An instantaneous change in the frequency of the VCO signal due to a change in the capactive reactance of the antenna when an intrusion occurs is reflected by a shift in phase between the VCO signal and the reference oscillator signal. This causes the phase comparator signal to change. A deriving means, preferably including a dual differentiator circuit, which derives the rate of the rate of change of the phase comparator signal, and a differential comparator, which is triggered by the dual differentiator circuit in the event of an intrusion, activates a signaling circuit so as to produce an alarm when an intrusion occurs. Since the antenna is connected to the VCO and there is no bidirectional coupling between the VCO and the reference oscillator, the electronic security apparatus is incapable of defeat by connection of a frequency generator to the antenna, because inherent drift in the reference oscillator eventually produces an alarm. Additional features are also disclosed.

Phase locked loop variable frequency generator

Abstract: The invention relates to phase locked loops in which a variable-frequency voltage-controlled oscillator (VCO) feeds a phase comparator via an adjustable divider having a division factor N. The comparator compares the phases of the divided frequency (Fd) and a reference frequency (Fr), and adjusts the VCO to produce phase equality. To enable the VCO frequency (FO) to be adjusted in smaller steps than Fr and yet maintain a loop bandwidth greater than the step size with good spurious performance (thus providing a "fractional N synthesizer"), Fo is made slightly more than N.Fr. The phase detector thus produces a phase error signal. At periodic instants, determined by the period of the frequency difference between Fo and N.Fr, a control unit temporarily increases N by unity so as to bring Fd and Fr into phase. To eliminate the sawtooth waveform that would otherwise be produced on the phase error signal, the control unit also produces unit increases in N during each such period so as to produce a phase difference between Fd and Fr which is opposite in sign to, and substantially offsets, the integrated value of the phase differences up to that instant. The phase error signal therefore undergoes only residual variations, and these are backed off by an analogue output derived from the control unit.

Multi-mode relaxation oscillator

Abstract: In a relaxation oscillator where the oscillation frequency is proportional to the charge rate of a capacitor, independent current sources are connected through separate switches to change the charge rate of the capacitor and thus the oscillation frequency. Each switch is controlled by signals from a separate detector of a condition which requires that the oscillation frequency be changed. An oscillation frequency increase between the standby and alarm modes of a smoke detector is accomplished in one disclosed embodiment and duty cycle means for controlling the operative period of the alarm indicator during each cycle of the increased oscillator frequency is disclosed in a more particular embodiment.

Double vernier time interval measurement using triggered phase-locked oscillators

Abstract: Measurement of a time interval between a start and a stop event is made by activating a start oscillator in response to the start event and activating a stop oscillator in response to the stop event. The number of cycles of each respective oscillator signal which occur between the activation of each oscillator and the coincidence of the respective oscillator signal with that of an independent time base is determined. The number of cycles of the time base signal between the coincident points of it and the start and stop oscillator signal is also determined. These numbers, which are always integers, are used along with the values for the time base period and the difference in frequency between the time base oscillator and the start and stop oscillators to calculate the time interval. Resolution of the measurement is dependent on the frequency difference between the time base signal and the start and stop oscillator signals. Two triggered-phase oscillators, which are phase-locked to the reference oscillator, are used to supply the start and stop frequencies. The start trigger and stop signals are used for phase shifting, i.e., restarting of the oscillators rather than starting the oscillators. This allows for pre-trigger frequency control, and essentially eliminates post trigger frequency drift which usually occurs when an oscillator is first started. The coincidence signals are provided by the phase cross-over between the phase locked oscillator and the reference by a digital mixer.

Phase corrected raster scanned light modulator and a variable frequency oscillator for effecting phase correction

Abstract: The present invention relates to a phase corrected raster scanned light modulator in which information modulated on a carrier is used to form a grating whose spatial frequency along the scanning line varies in accordance with the signal modulation frequency. Thickness variation in the medium on which the grating is formed causes an undesired phase modulation of the light which may be corrected by altering the carrier frequency. A novel oscillator is described which may be stepped discontinuously in frequency while the waveform and its slope remain continuous, which is of sufficient accuracy and agility to provide a real time region by region phase correction of the raster in the light modulator. The variable frequency oscillator is of high stability and can step from one value to another for intervals as short as one microsecond.

Phase-locked loop with variable gain and bandwidth

Abstract: A phase locked loop includes a voltage-controlled oscillator, and a phase and frequency detector for comprising an input signal pulse wave with a pulse wave from the voltage-controlled oscillator, and for providing a frequency control voltage to the voltage-controlled oscillator. When the pulses overlap, a pulse comparison circuit in the phase and frequency detector produces a frequency "up" signal or a frequency "down" signal proportional to the correction necessary. When the pulses do not overlap, the pulse comparison circuit produces a "non-overlap" signal which effects a rapid frequency correction by causing a current pump in the phase and frequency detector to increase its output to a fixed maximum value, and by causing a loop filter to increase its bandwidth to a fixed maximum value.

System and method for extracting timing information from a modulated carrier

Abstract: The disclosure relates to an apparatus for receiving a carrier signal modulated with digital symbols, the symbol rate being related to the carrier frequency, such as by a submultiple or a ratio of integers. The invention is an adaptive carrier-aided symbol tracking loop in which signals derived from a symbol-coherent carrier maintain and aid symbol synchronization during periods of no symbol transitions. The invention is particularly applicable to systems wherein the received modulated carrier signal has been transmitted over a noisy transmission path, such as in a logging-while-drilling system. In accordance with the invention there is provided a phase-locked loop which includes a voltage controlled oscillator and an error signal generator for controlling the oscillator. In response to the carrier, a first signal is generated at substantially the symbol rate and, in response to symbol transitions, a second signal is generated which has a phase that depends upon symbol transitions. The error signal generator includes at least one phase comparator which is responsive to a signal derived from the oscillator and to the first and second signals for generating error signals that are applied to the oscillator. If symbol transitions are present, the second signal is used to maintain loop synchronization. If symbol transitions are absent, loop synchronization is maintained by deriving the error signal from the first signal; i.e., a signal at the symbol rate derived from the carrier.

Phase-locked loop circuit for use in synthesizer tuner and synthesizer tuner incorporating same

Abstract: A phase-locked loop (PLL) circuit and a synthesizer tuner incorporating the PLL circuit where a second DC control signal is applied to the PLL voltage controlled oscillator to reduce the phase error output signal from the PLL phase detector to near zero volts and thereby improve the performance of the voltage controlled oscillator and the S/N ratio of the tuner. Various circuits are disclosed for deriving the above second DC control signal. Further improvement in the S/N ratio is effected by switching in a narrow capture range for the PLL circuit when the desired signal is received and when the PLL phase detector output is operated near zero volts. Also when the station is changed, detuning is detected to switch in a broader capture range.

Reverse channel GaAsFET oscillator

Abstract: A common-drain high frequency power oscillator is configured by electrically reversing the channel of a GaAsFET transistor. Such an oscillator can be flip-chip mounted for reduced thermal resistance and has superior oscillation characteristics as compared with conventional common-source oscillators. Specifically, its gain is nearly constant with frequency, oscillation is less critically dependent on terminal impedance, and it can be operated with a single polarity voltage supply.

Low-power magnetometer circuit with constant current drive

Abstract: The drive signal applied to the drive winding of a magnetometer is provided by a voltage controlled oscillator. The average current flowing through the drive winding is monitored, and a signal representative of the average current is applied to the input of the voltage control oscillator. The sense windings of the magnetometer are connected to a servo-loop which causes a current to flow in the sense windings which produces a magnetic field cancelling the sensed components of the earth's magnetic field. The magnetometer uses a drive signal which saturates the core for only a short duration of time thereby reducing the power required by the magnetometer while ensuring complete saturation of the core.

Discriminator aided phase lock acquisition for suppressed carrier signals

Abstract: A discriminator aided technique for acquisition of phase lock to a suppressed carrier signal utilizes a Costas loop which is initially operated open loop and control voltage for its VCXO is derived from a phase detector that compares the VCXO to a reference frequency thus establishing coarse frequency resolution with the received signal. Then the Costas loop is closed with the low-pass filter of the channel having a bandwidth much greater (by a factor of about 10) than in the I channel so that a frequency discriminator effect results to aid carrier resolution. Finally, after carrier acquisition, the Q-channel filter of the Costas loop is switched to a bandwidth substantially equal to that of the I-channel for carrier tracking.

FM Signal demodulator with defect detection

Abstract: In the playback of a video disc record employing an FM carrier recording format, a defect compensation system is provided which substitutes delayed video signals for current video signals when a defect is encountered. A phase locked loop including a phase detector and a voltage controlled oscillator is employed in FM detection circuits. A defect detector compares the phase between the oscillator output signal and a signal corresponding to the recovered signal. When the phase difference between these two signals exceeds a certain value, a defect signal is generated to disable the normal signal path of the recovered signal so that the delayed version of the video may be substituted for the current video for the duration of the occurrence of the defect.

Means for reducing spurious frequencies in a direct frequency synthesizer

Abstract: Spurious frequencies are eliminated in a direct frequency synthesizer by means of a feed forward correction circuit. The improved direct frequency synthesizer of the invention includes a series adder, clocked register, a D/A converter and a phase corrector. The adder is inputted by a digital control increment and the output of the register. The system clock frequency is divided down by a smoothing counter that in part controls the phase of the output signal. Spurious frequencies are manifested by overflow of the register. The register overflow is converted to an analog signal by the D/A converter. The system output is provided by a voltage controlled oscillator that is controlled by an amplifier which is responsive to both the smoothing counter output and the analog output of the D/A converter. Additionally, the D/A converter is sampled twice for every cycle of output frequency, resulting in a doubling of the output frequency for a given D/A converter.

Thickness-shear mode quartz oscillator with an added non-circular mass

Abstract: A thickness-shear mode quartz oscillator characterized in that an addition mass fitted to a driving electrode of the oscillator for the purpose of adjusting its oscillation frequency has a non-circular shape or the fitting position thereof is deviated from the center of a quartz slice, or both in combination. Such addition mass provides different piezoelectric effects and effects of addition of the mass between the fundamental main vibration and harmonic vibrations and eliminates or restricts a "frequency abnormal phenomenon". Consequently, even when driven by a C-MOS type integrated circuit not having a frequency selection circuit in its oscillation loop, the thickness-shear mode quartz oscillator exhibits stable frequency-temperature characteristics.

Motor speed adjusting apparatus

Abstract: A motor speed adjusting apparatus comprising a motor, a motor speed setting device such as an up-down counter, a programmable divider the divisor of which is programmed by the motor speed setting device, a reference signal generator, a phase comparator which generates a d.c. voltage corresponding to the phase difference between the reference frequency signal and the output signal of the programmable divider, and a voltage controlled oscillator which oscillates at a frequency corresponding to the output of the phase comparator. The motor speed is adjusted according to the output frequency of the oscillator by step deviation from the standard motor speed, and further that deviation is displayed by a display device controlled by the motor speed setting device.

Digitized frequency synthesizer

Abstract: A frequency synthesizer including a phase lock loop comprising a voltage controlled oscillator, a four phase modulator for modulating the oscillator output signal, a phase detector for comparing the phases of a reference signal and the output signal of the modulator and filter means for supplying the phase detector output signal back to the oscillator. The two most significant bits of an arithmetic synthesizer are supplied to the modulator to produce, in the absence of additional modulating signals, discrete increments of 90° phase shift in the oscillator output signal. To eliminate phase jitter, the remaining lower order bit positions of the arithmetic synthesizer are converted to analog voltages which are supplied into the phase lock loop to effect a gradual phase shift between the otherwise discrete 90° phase shifts. Continuous phase, constant amplitude output signal is thereby produced having a frequency translated by the phase shifts introduced by the arithmetic synthesizer.

Multi-mode programmable digital cardiac pacemaker

Abstract: A programmable cardiac pacemaker pulse generator utilizing digital circuitry for controlling the provision of cardiac stimulating pulses. The pulse generator is capable of having the rate, the pulse width, the pulse amplitude, the refractory period, the sensitivity and the mode of operation programmed. In addition, the pulse generator can have the output inhibited and can respond to programming signals causing a threshold margin test to be performed, effects of closure of the reed switch overridden, a hysteresis function added and a high rate exceeding the normal upper rate limit programmed. Many of the programmable functions of the pulse generator can either be programmed on a permanent or a temporary basis. The pulse generator further includes means for signaling the acceptance of a programming signal, and means to reset the program acceptance circuit if extraneous signals are detected as programming signals. The program signal acceptance circuit performs several different checks on the detected programming signal including a parity check, an access code check and determining if the proper number of signals were transmitted within a given time. The timing circuit of the pulse generator includes a crystal clock oscillator and counter means for counting the clock pulses therefrom to determine the rate of the pacemaker. The pulse width of each pacemaker pulse is determined by using a voltage controlled oscillator in place of the crystal oscillator to obtain energy compensation due to the battery voltage decreasing with time.

Radar receiver and method of indicating range to a radar source

Abstract: A radar receiver for indicating the presence of a source of microwave energy includes an antenna, a modulation oscillator and modulator diode, a detector diode connected to bandpass amplifier stages, a peak detector providing a signal proportional in level to the received microwave energy signal strength, and a voltage controlled oscillator (VCO) connected to the peak detector and having a frequency in proportion to the peak detector signal level, the frequency of the VCO being an indication of range from a source of radar and a change in frequency being an indication of a rate of approach thereto. The VCO controls a transistor switch, and alarm output devices are connected through the transistor with alarm power sources, whereby an alarm signal activates the output device at a frequency related to the microwave signal strength. A comparator is connected in parallel to the VCO and triggers in response to a selected level of the peak detector signal to provide a steady level signal which closes the transistor switch and effects a steady alarm to indicate a selected range from the radar source.

Master timing generator

Abstract: A master timing generator capable of tracking an externally generated clock signal and of maintaining desired operation during periods of disruption or perturbation of the clock signal by noise or other high-energy disturbances. The master timing generator includes a voltage controlled oscillator controlled by an input dc control voltage to produce an output signal which is maintained in a particular phase relationship with the clock signal by phase lock loop circuitry coupled to the oscillator. A dc standby voltage signal representative of the value of the control voltage applied to the oscillator is retained during operation of the master timing generator in a standby unit which, in the absence of noise affecting the clock signal, is electrically uncoupled from the oscillator. When the clock signal is affected by noise, an alarm signal representative of this condition is applied to the master timing generator and causes the phase lock loop circuitry to be electrically disengaged from the oscillator and the dc standby voltage signal retained in the standby unit to be switched to the input of the oscillator. This standby voltage signal is employed by the oscillator to produce its desired output signal for so long as the clock signal is affected by noise and the alarm signal representative of this condition is applied to the master timing generator. Upon termination of the alarm signal, the master timing generator returns to its normal mode of operation.

Circuit for synchronizing a pseudo-random generator mounted at a receiver for communication transmission systems utilizing pseudo-noise phase shift keying

Abstract: A circuit for synchronizing a pseudo-random generator at a receiver and which actuates a phasing device that cancels phase shift keying accomplished at the transmitter and uses a regulating loop with a delay device such as a delay line for correlating the received signal with the pseudo-random sequence which is produced at the receiver and conforms with a transmitter pseudo-random sequence and consists of a random alignment of the binary values L and H in a fixed pulse plan where the sequence repeats following a specific number of timing pulses and wherein the delay device which is fed with the received signal has a plurality of tappings which are of the same time spacing and which correspond to the reciprocal of the pulse train frequency of the pseudo-random sequence with a first portion of the tappings connected directly to an adding device at the receiver and the second portion of the tappings connected to the adding device through an 180° phase reversal means and the output of the adding device is fed to a rectifier and wherein a phase detector receives the output of the rectifier and the output from a pseudo-random generator at the receiver and the phase detector controls a voltage controlled oscillator through a loop filter which regulates the pulse train frequency of the pseudo-random generator.

Non-linear control circuit

Abstract: A low-Q mechanical resonator is operated in its series resonance mode in a circuit that includes an amplifier and voltage variable phase shifter. As the phase shift is varied, the resonator will shift its frequency to compensate the phase shift. The result is a voltage variable oscillator frequency. The low-Q resonator has a non-linear phase versus frequency characteristic so that frequency is not a linear function of control voltage. A plural emitter transistor is employed in one side of a non-linear differential control amplifier. The resulting non-linear transfer characteristic is used to compensate the non-linear oscillator characteristic so that the frequency versus control voltage is linear.

Digital numerically controlled oscillator

Abstract: The frequency and phase of an output signal from an oscillator circuit are controlled with accuracy by a digital input word. Positive and negative alterations in output frequency are both provided for by translating all values of input words so that they are positive. The oscillator reference frequency is corrected only in one direction, by adding phase to the output frequency of the oscillator. The input control word is translated to a single algebraic sign and the digital 1 is added thereto. The translated input control word is then accumulated. A reference clock signal having a frequency at an integer multiple of the desired frequency of the output signal is generated. The accumulated control word is then compared with a threshold level. The output signal is adjusted in a single direction by dividing the frequency of the reference clock signal by a first integer or by an integer different from the first integer.

Phase locked loop with switchable filter

Abstract: Disclosed is a phase-locked loop which comprises a voltage controlled variable frequency oscillator (1), a phase comparator (2) having a cosine characteristic and receiving a reference oscillation as well as that supplied by the oscillator (1), and a low-pass filter (3) connected between the output of the phase comparator (2) and a frequency control input of the oscillator (1). The transfer function of the low-pass filter (3) is switchable between two characteristics depending on the instantaneous phase difference between the reference oscillation and that supplied by the oscillator. The first low-pass filter transfer function is adapted to the phase-locked operation of the loop, while the second transfer function is adapted for frequency capture.

Arrangement for synchronizing a free-swinging oscillator

Abstract: A system is disclosed for synchronizing a free-swinging oscillator to a reference signal of a substantially lower frequency. A regulating circuit connects to the oscillator to control the frequency thereof. A quartz oscillator is provided for producing the reference signal. The reference signal is subsequently connected to a frequency multiplier and/or frequency divider, an amplifier and a pass band filter. An output signal from the pass band filter is fed to a harmonics mixer connected to the free-swinging oscillator and which produces a pattern of harmonics. A selective amplifier feeds an intermediate frequency obtained from the harmonics mixer to the regulator circuit. A filter also connected to the quartz oscillator produces harmonics which are also coupled to the regulating circuit. By phase or frequency comparison the regulating circuit adjusts the running frequency of the free-swinging oscillator.

Frequency stabilization technique for microstrip oscillators

Abstract: An apparatus for frequency stabilizing a microstrip oscillator using an integrated diplexer as a frequency discriminator. The crossover frequency of the microstrip diplexer is used in a feedback arrangement to stabilize a millimeter-wave oscillator. The diplexer is coupled to the output of the oscillator and detects a shift from the desired oscillator output frequency. This shift in frequency is converted to a voltage for controlling the varactor tuning element of the oscillator to thereby return the oscillator to the desired operating frequency. Means are also provided for sensing a temperature change in the diplexer and for insuring that the oscillator output frequency is maintained at the desired frequency regardless of this temperature change.

Power conversion and regulation system

Abstract: A DC or AC power conversion and regulation system in which DC or rectified AC is applied to a voltage controlled oscillator (VCO). The output of the VCO is applied to a frequency sensitive filter whose frequency response is such that for a fixed input voltage the output voltage is a function of the input frequency. The output of the filter is applied to a transformer whose output may be rectified to provide a regulated DC output. A portion of the rectified DC is sampled and compared with a reference voltage to generate an error signal which is used in a feedback loop to control the operating frequency of the VCO.

Synchronisation of oscillator with input circuit of superhet receiver - sorting control voltages for input circuit corresp. to those of oscillator

Abstract: The circuits automatically synchronised have electronic tuning controlled by a variable control voltage. The oscilator's control voltage range is divided into discrete stops. When at least the same number of control voltage steps is applied to the oscillator, a control voltage is applied to the input circuits so that its resonant frequency is lower by the i.f. than the oscillator frequency. Voltage values so determined for the input circuit are reproducibly stored without change. Application to the oscillator of control voltages retrieves from the store corresponding input circuit voltages and applies them to it.