The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

http://science.sciencemag.org/content/sci/311/5758/208.full.pdf

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

The present invention provides methods, systems and system components for transferring, assembling and integrating features and arrays of features having selected nanosized and/or microsized physical dimensions, shapes and spatial orientations. Methods of the present invention utilize principles of ‘soft adhesion’ to guide the transfer, assembly and/or integration of features, such as printable semiconductor elements or other components of electronic devices. Methods of the present invention are useful for transferring features from a donor substrate to the transfer surface of an elastomeric transfer device and, optionally, from the transfer surface of an elastomeric transfer device to the receiving surface of a receiving substrate. The present methods and systems provide highly efficient, registered transfer of features and arrays of features, such as printable semiconductor element, in a concerted manner that maintains the relative spatial orientations of transferred features.

Pattern Transfer Printing by Kinetic Control of Adhesion to an Elastomeric Stamp

The present invention provides device components geometries and fabrication strategies for enhancing the electronic performance of electronic devices based on thin films of randomly oriented or partially aligned semiconducting nanotubes. In certain aspects, devices and methods of the present invention incorporate a patterned layer of randomly oriented or partially aligned carbon nanotubes, such as one or more interconnected SWNT networks, providing a semiconductor channel exhibiting improved electronic properties relative to conventional nanotubes-based electronic systems.

Medium scale carbon nanotube thin film integrated circuits on flexible plastic substrates

Theoretical models of Schottky-barrier height formation are reviewed. A particular emphasis is placed on the examination of how these models agree with general physical principles. New concepts on the relationship between interface dipole and chemical bond formation are analyzed, and shown to offer a coherent explanation of a wide range of experimental data.

Recent advances in Schottky barrier concepts

The formation of the Schottky barrier height (SBH) is a complex problem because of the dependence of the SBH on the atomic structure of the metal-semiconductor (MS) interface. Existing models of the SBH are too simple to realistically treat the chemistry exhibited at MS interfaces. This article points out, through examination of available experimental and theoretical results, that a comprehensive, quantum-mechanics-based picture of SBH formation can already be constructed, although no simple equations can emerge, which are applicable for all MS interfaces. Important concepts and principles in physics and chemistry that govern the formation of the SBH are described in detail, from which the experimental and theoretical results for individual MS interfaces can be understood. Strategies used and results obtained from recent investigations to systematically modify the SBH are also examined from the perspective of the physical and chemical principles of the MS interface.

The physics and chemistry of the Schottky barrier height

Thermally annealed Ni/n-GaAs(Si)/In Schottky barrier diodes

The effective barrier heights and ideality factors of identically fabricated Ni/n-type 6 H-SiC Schottky diodes (23 dots) have been calculated from their experimental forward bias current–voltage (I–V) and reverse bias capacitance–voltage (C–V) characteristics. A statistical study related to the experimental barrier heights (BHs) and ideality factors of the diodes has been made. The effective Schottky barrier heights (SBHs) and ideality factors obtained from the I–V and C–V characteristics have differed from diode to diode. The BHs obtained from the I–V characteristics varied from 0.85 to 1.03 eV, the ideality factors varied from 1.13 to 1.40 and the BHs from C-2–V characteristics varied from 1.10 to 1.70 eV. The experimental BH and ideality factor distributions obtained from the I–V characteristics are fitted by a Gaussian function, and their mean values are found to be 0.92±0.04 eV and 1.29±0.08 eV, respectively. The lateral homogeneous SBH value of 1.16 eV for the Ni/n-type 6H-SiC diodes has been calculated from a linear extrapolation of the effective barrier heights to nif=1.03.

The barrier-height inhomogeneity in identically prepared Ni/n-type 6H-SiC Schottky diodes

Determination of the laterally homogeneous barrier height of thermally annealed and unannealed Au/p-InP/Zn-Au Schottky barrier diodes

The Schottky barrier height and ideality factor n of Cr - Ni - Co alloy Schottky contacts on an n-LEC GaAs substrate have been measured using current - voltage (I - V) and capacitance - voltage (C - V) techniques after different thermal annealings for 5 min in (temperature range from 300 to ). The values of and n for the forward I - V characteristics range from 0.65 and 1.001 eV at room temperature (RT) to 0.86 and 1.095 eV at . Thereby, the barrier height enhancement has been explained in terms of the presence of microclusters of one or more interface phases produced by reactions between the alloy and GaAs or the native oxide layer. The stability value of 1.010 for n from the RT to annealing has been ascribed to reduction of the native oxide layer on the GaAs surface by Cr in the alloy. The C - V relationship of the Cr - Ni - Co/n-GaAs Schottky diode at 1 MHz gives values of 0.68, 0.74 and 0.85 eV for at RT, and annealing temperatures respectively. The fact that the - V curves after annealing above show two linear regions separated by a transition segment has been attributed to the diffusion of Cr into GaAs during the thermal annealing process.

Effect of thermal annealing in nitrogen on the I - V and C - V characteristics of Cr - Ni - Co alloy/LEC n-GaAs Schottky diodes

We have identically prepared Au/n-InP/In Schottky barrier diodes (SBDs). The barrier height for the Au/n-InP/In SBDs from the current–voltage characteristics has varied from 0.557 eV to 0.615 eV, and the ideality factor n from 1.002 to 1.087. We have determined a lateral homogeneous barrier height value of approximately 0.597 eV for the Au/n-InP/In SBD from the experimental linear relationship between barrier heights and ideality factors. The barrier height value obtained from the reverse bias C−2–V characteristics has varied from 0.512 eV to 0.572 eV and statistical analysis yields the mean Φ(C–V) = 0.562 ± 0.004 eV. A doping density of about (2.90 ± 0.05) × 1015 cm−3 has been determined from the reverse bias C−2–V characteristics.

Abdulmecit Türüt

Papers

Thermally annealed Ni/n-GaAs(Si)/In Schottky barrier diodes

The barrier-height inhomogeneity in identically prepared Ni/n-type 6H-SiC Schottky diodes

Determination of the laterally homogeneous barrier height of thermally annealed and unannealed Au/p-InP/Zn-Au Schottky barrier diodes

Effect of thermal annealing in nitrogen on the I - V and C - V characteristics of Cr - Ni - Co alloy/LEC n-GaAs Schottky diodes

Determination of the lateral barrier height of inhomogeneous Au/n-type InP/In Schottky barrier diodes