scispace - formally typeset
A

Adam Powell

Researcher at University of Hertfordshire

Publications -  7
Citations -  131

Adam Powell is an academic researcher from University of Hertfordshire. The author has contributed to research in topics: Image compression & Design space exploration. The author has an hindex of 4, co-authored 7 publications receiving 108 citations. Previous affiliations of Adam Powell include Altran & Imperial College London.

Papers
More filters
Proceedings ArticleDOI

GPU Versus FPGA for High Productivity Computing

TL;DR: It is shown that the GPU is more productive than the FPGA architecture for most of the benchmarks and it is concluded thatFPGA-based HPCS is being marginalised by GPUs.
Journal ArticleDOI

BRADSHAW: a system for automated molecular design

TL;DR: BRADSHAW is introduced, a system for automated molecular design which integrates methods for chemical structure generation, experimental design, active learning and cheminformatics tools, and embodies a philosophy of automation, best practice, and experimental design.
Journal ArticleDOI

Developing Fine-Grained Actigraphies for Rheumatoid Arthritis Patients from a Single Accelerometer Using Machine Learning.

TL;DR: The objective of this work is to develop a method that can generate fine-grained actigraphies to capture the impact of the disease on the daily activities of patients to generate objective RA disease-specific markers of patient mobility in-between clinical site visits.
Journal ArticleDOI

High-level power and performance estimation of FPGA-based soft processors and its application to design space exploration

TL;DR: The proposed framework is based on regression trees, a popular machine learning technique, that can capture the relationship of low-level soft-processor parameters and high-level algorithm parameters of a specific application domain, such as image compression.
Proceedings ArticleDOI

Early performance estimation of image compression methods on soft processors

TL;DR: Using the proposed framework, a quick power consumption and execution time estimate can be obtained early in the design phase allowing system designers to estimate these performance metrics without the need of implementing the algorithm or generating all possible soft processor architectures.