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Andrea Bandiziol
Researcher at Infineon Technologies
Publications - 15
Citations - 174
Andrea Bandiziol is an academic researcher from Infineon Technologies. The author has contributed to research in topics: Equalization (audio) & Transmitter. The author has an hindex of 5, co-authored 14 publications receiving 111 citations. Previous affiliations of Andrea Bandiziol include University of Udine.
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Journal ArticleDOI
Analytical Modeling of Jitter in Bang-Bang CDR Circuits Featuring Phase Interpolation
Pierpaolo Palestri,Ahmed Elnaqib,Davide Menin,Klaid Shyti,Francesco Brandonisio,Andrea Bandiziol,Davide Rossi,Roberto Nonis +7 more
TL;DR: Compact expressions for the jitter in clock and data recovery (CDR) circuits based on bang-bang phase detector including the phase noise of the transmitter and receiver oscillators as well as the quantization noise associated with the finite number of phases of the phase interpolator (PI) that align the receiver clock to the incoming data.
Proceedings ArticleDOI
A simple and fast tool for the modelling of inter-symbol interference and equalization in high-speed chip-to-chip interfaces
A. Cortiula,Martino Dazzi,M. Marcon,Davide Menin,M. Scapol,Andrea Bandiziol,A. Cristofoli,Werner Grollitsch,Roberto Nonis,Pierpaolo Palestri +9 more
TL;DR: A simulator that based on the architecture of a specified transmission channel and the main features of transmitter and receiver computes the eye diagram and the bit-error rate of high-speed serial interfaces is described.
Proceedings ArticleDOI
Automotive-Range Characterization of a 11 Gb/s Transceiver for Automotive Microcontroller Applications with 8-Tap FFE, 1-Tap Unrolled/3-Tap DFE and Offset-Compensated Samplers
Dylan D'Ampolo,Andrea Bandiziol,Davide Menin,Werner Grollitsch,Roberto Nonis,Pierpaolo Palestri +5 more
TL;DR: The experimental characterization of a High-Speed Serial Interface (HSSI) for automotive microcontroller applications designed in 28 nm planar CMOS technology, verified over automotive corners and operating up to 11 Gb/s is presented.
Journal ArticleDOI
A Time-Domain Simulation Framework for the Modeling of Jitter in High-Speed Serial Interfaces
Alessio Cortiula,Davide Menin,Andrea Bandiziol,Werner Grollitsch,Roberto Nonis,Pierpaolo Palestri +5 more
TL;DR: In this article , a time-domain numerical modeling framework was developed to estimate timing jitter in high speed serial interfaces (HSSI) including a wide range of effects such as Inter-Symbol Interference (ISI) due to channel dispersion, phase noise of transmitter (TX) and receiver (RX) frequency synthesizers and use of bang-bang phase detector in the clock and data recovery (CDR) loop.
Proceedings ArticleDOI
System and transistor level analysis of an 8-taps FFE 10Gbps serial link transmitter with realistic channels and supply parasitics
TL;DR: It is shown that the parasitic inductance on the supply terminals degrades the performance in terms of jitter and SNR and tends to hamper the benefits of FFE.